公开(公告)号：US12230218B2

公开(公告)日：2025-02-18

申请号：US18470201

申请日：2023-09-19

Applicant: LG Display Co., Ltd.

Inventor： Jaesung Park ,  SeongHwan Hong

IPC: G09G3/3266 ,  G09G3/3291 ,  G09G3/36

Abstract: Embodiments of the disclosure relate to a display device and a display driving method. Specifically, there may be provided a display device comprising a display panel having a plurality of subpixels, a gate driving circuit supplying a plurality of scan signals to the display panel through a plurality of gate lines, a data driving circuit supplying a plurality of data voltages to the display panel through a plurality of data lines, a power management circuit supplying a plurality of driving voltages to the gate driving circuit and the data driving circuit, and a timing controller controlling the power management circuit to change a level of a gate voltage applied to the gate driving circuit according to an output state of the gate driving circuit.

公开(公告)号：US12260828B2

公开(公告)日：2025-03-25

申请号：US18508340

申请日：2023-11-14

Applicant: LG Display Co., Ltd.

Inventor： Jaesung Park ,  Kwangsoo Kim

IPC: G09G3/3266

Abstract: Disclosed herein are a gate driving circuit having a small-area structure and a display device, and more specifically, each of a plurality of stage circuits included in the gate driving circuit includes a sensing part, a logic part, and a buffer group, first to fourth scan clock signals and a first carry clock signal are electrically connected to a first stage circuit, and fifth to eighth scan clock signals and a second carry clock signal are electrically connected to a second stage circuit.

公开(公告)号：US12051371B2

公开(公告)日：2024-07-30

申请号：US18066759

申请日：2022-12-15

Applicant: LG Display Co., Ltd.

Inventor： KwangSoo Kim ,  YongHo Kim ,  Jaesung Park

IPC: G09G3/3266 ,  G09G3/32

CPC classification number: G09G3/3266 ,  G09G3/32 ,  G09G2310/0267 ,  G09G2310/0291 ,  G09G2310/061

Abstract: According to embodiments of the disclosure, a gate driving circuit and a display device may include four buffer groups for driving 4k scan lines, two common logic units for controlling the four buffer groups, and a common sensing circuit controlling to output a sensing driving scan signal to at least one scan line among the 4k scan lines. Thus, it is possible to allow the gate driving circuit to have a low-area structure and to reduce the bezel area of the display device.