公开(公告)号：US20230110957A1

公开(公告)日：2023-04-13

申请号：US17938965

申请日：2022-09-07

Applicant: MEDIATEK INC.

Inventor： Ya-Lun Yang ,  Wen-Chou Wu ,  Che-Hung Kuo

IPC: H01L25/18 ,  H05K1/18 ,  H05K1/14 ,  H01L23/31 ,  H01L23/538 ,  H01L23/367 ,  H01L23/498

Abstract: An electronic device includes a main printed circuit board (PCB) assembly comprising a bottom PCB and a semiconductor package mounted on an upper surface of the bottom PCB. The semiconductor package includes a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die and the top surface of the substrate are encapsulated by a molding compound. A top PCB is mounted on the semiconductor package through first connecting elements.

公开(公告)号：US20230116326A1

公开(公告)日：2023-04-13

申请号：US17938911

申请日：2022-09-06

Applicant: MEDIATEK INC.

Inventor： Ya-Lun Yang ,  Wen-Chou Wu ,  Che-Hung Kuo

IPC: H01L23/48 ,  H01L25/16 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor package includes a bottom package having a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die has an active surface and a rear surface coupled to the top surface of the substrate. The semiconductor die comprises through silicon vias. A top package is stacked on the bottom package. The top package comprises a memory component. A middle re-distribution layer (RDL) structure is disposed between the top package and the bottom package. The active surface of the semiconductor die is directly connected to the middle RDL structure through connecting elements. The memory component is electrically connected to the substrate via the interconnect structures of the middle RDL structure and the through silicon vias of the semiconductor die.

公开(公告)号：US12230622B2

公开(公告)日：2025-02-18

申请号：US17938965

申请日：2022-09-07

Applicant: MEDIATEK INC.

Inventor： Ya-Lun Yang ,  Wen-Chou Wu ,  Che-Hung Kuo

IPC: H05K1/14 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  H05K1/18 ,  H01L23/00

Abstract: An electronic device includes a main printed circuit board (PCB) assembly comprising a bottom PCB and a semiconductor package mounted on an upper surface of the bottom PCB. The semiconductor package includes a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die and the top surface of the substrate are encapsulated by a molding compound. A top PCB is mounted on the semiconductor package through first connecting elements.