公开(公告)号：US20220350948A1

公开(公告)日：2022-11-03

申请号：US17246735

申请日：2021-05-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Israel Albert Yankelovich

IPC: G06F30/367 ,  G06F30/398

Abstract: A method for checking electrical rules in a design of a circuit including transistors connected by nodes, includes defining a hierarchical database including (i) a root representing the circuit, and (ii) instances of context-cells representing design entities and including node-ports that connect the design entities. Electrical properties of the node-ports are propagated from the root through the node-ports to at least a portion of the context-cells. The electrical properties, which were propagated from the root, are propagated from one or more of the context-cells to one or more peer context-cells. An electrical rule violation in at least one of the context-cells is identified based on the propagated electrical properties.