公开(公告)号：US06236727B1

公开(公告)日：2001-05-22

申请号：US08881139

申请日：1997-06-24

申请人： Mark Louis Ciacelli ,  John William Urda ,  Wai Man Lam ,  Jack Lawrence Kouloheris ,  John Edward Fetkovich

发明人： Mark Louis Ciacelli ,  John William Urda ,  Wai Man Lam ,  Jack Lawrence Kouloheris ,  John Edward Fetkovich

IPC分类号： H04N7167

CPC分类号： G11B20/0021 ,  G06F21/10 ,  G06F21/72 ,  G06F2211/007 ,  G06F2221/2107 ,  G11B20/00086 ,  G11B20/00224 ,  G11B20/00449 ,  G11B20/00478 ,  G11B20/00507 ,  H04N21/4408

摘要： Apparatus, method and computer program product are provided for digitally processing an encrypted data stream scrambled, for example, according to content scrambling system (CSS) technology. This digital processing insures against communication of clear data within the computer system from a central processing unit (CPU) to any accessible structure, such as memory or a system bus. Descrambling of the (CSS) scrambled data stream occurs within a module executing on the CPU, which is followed by reencryption of the data prior to transfer from the CPU. By so processing the data, integrity of copyrighted material is maintained, while allowing for software descrambling of the CSS encrypted data stream. Various techniques for establishing the encryption/decryption algorithm pair employed are described. Decryption of the re-encrypted data can occur at a receiving software module and/or a receiving hardware device, such as a decoder.

摘要翻译： 提供装置，方法和计算机程序产品，用于数字处理例如根据内容加扰系统（CSS）技术加扰的加密数据流。 该数字处理确保将计算机系统内的清晰数据从中央处理单元（CPU）传送到任何可访问的结构，例如存储器或系统总线。 （CSS）加扰数据流的解扰发生在CPU上执行的模块中，随后在从CPU传送之前重新加密数据。 通过处理数据，维护版权材料的完整性，同时允许CSS加密数据流的软件解扰。 描述了用于建立所使用的加密/解密算法对的各种技术。 重新加密的数据的解密可以在接收软件模块和/或接收硬件设备（诸如解码器）处发生。

公开(公告)号：US6009171A

公开(公告)日：1999-12-28

申请号：US881139

申请日：1997-06-24

申请人： Mark Louis Ciacelli ,  John William Urda ,  Wai Man Lam ,  Jack Lawrence Kouloheris ,  John Edward Fetkovich

发明人： Mark Louis Ciacelli ,  John William Urda ,  Wai Man Lam ,  Jack Lawrence Kouloheris ,  John Edward Fetkovich

摘要： Apparatus, method and computer program product are provided for digitally processing an encrypted data stream scrambled, for example, according to content scrambling system (CSS) technology. This digital processing insures against communication of clear data within the computer system from a central processing unit (CPU) to any accessible structure, such as memory or a system bus. Descrambling of the (CSS) scrambled data stream occurs within a module executing on the CPU, which is followed by re-encryption of the data prior to transfer from the CPU. By so processing the data, integrity of copyrighted material is maintained, while allowing for software descrambling of the CSS encrypted data stream. Various techniques for establishing the encryption/decryption algorithm pair employed are described. Decryption of the re-encrypted data can occur at a receiving software module and/or a receiving hardware device, such as a decoder.

公开(公告)号：US06999105B2

公开(公告)日：2006-02-14

申请号：US10728347

申请日：2003-12-04

申请人： Daniel Joseph Buerkle ,  David Allen Hrusecky ,  Charles Francis Marino ,  Chuck Hong Ngai ,  John William Urda

发明人： Daniel Joseph Buerkle ,  David Allen Hrusecky ,  Charles Francis Marino ,  Chuck Hong Ngai ,  John William Urda

IPC分类号： G09G5/00 ,  G09G5/36

CPC分类号： G06T3/40 ,  G06T1/60 ,  G09G2340/0407

摘要： An apparatus, circuit arrangement, program product and method of scaling an image horizontally partition a source image into a plurality of partitions, with each partition having a width that is no greater than the width of a line buffer used to scale the image. By partitioning an image into a plurality of partitions, the overall width of the scaled image is not constrained by the width of the line buffer. As a result, in many instances line buffers that are significantly smaller than conventional full-width line buffers may be used to generate scaled images that are substantially wider than may be generated by conventional buffers. Moreover, when implemented in hardware, the line buffers typically occupy significantly less real estate on an integrated circuit, thus reducing both cost and power consumption.

摘要翻译： 将图像缩放水平分割为多个分区的装置，电路装置，程序产品和方法，其中每个分区的宽度不大于用于缩放图像的行缓冲器的宽度。 通过将图像分割成多个分区，缩放图像的总宽度不受线路缓冲器的宽度的约束。 结果，在许多情况下，显着小于常规全宽线缓冲器的行缓冲器可以用于产生比可能由常规缓冲器产生的图像大得多的缩放图像。 此外，当以硬件实现时，线路缓冲器通常在集成电路上占据明显更少的空间，从而降低成本和功耗。