公开(公告)号：US20040150612A1

公开(公告)日：2004-08-05

申请号：US10762501

申请日：2004-01-23

Applicant: NEC LCD Technologies, Ltd.

Inventor： Noboru Okuzono ,  Koichi Koga

IPC: G09G003/36

CPC classification number: G09G3/3614 ,  G09G3/3648 ,  G09G2320/0204 ,  G09G2320/0223

Abstract: A liquid crystal display is provided which has low power consumption, and which prevents horizontal stripes from occurring without the circuitry becoming more complex. When the write voltage polarity is inverted every plurality of lines, in the n line where the polarity is inverted, the rise in the drain line waveform dulls due to the charging of the drain line. In the nnull1 line, because the drain line has been charged by the writing of the n line, waveform dullness does not occur. A difference between the write states in the two lines causes horizontal stripes. Consequently, the output enable signal is activated at the rise of the clock signal, and the gate line is activated after a predetermined time to start the writing. Therefore, writing is not performed during the period of waveform dullness, and the write state is the same across all scan lines.

公开(公告)号：US20040150604A1

公开(公告)日：2004-08-05

申请号：US10762502

申请日：2004-01-23

Applicant: NEC LCD Technologies, Ltd.

Inventor： Noboru Okuzono ,  Koichi Koga

IPC: G09G003/36

CPC classification number: G09G3/3614 ,  G09G3/3648 ,  G09G2320/0204 ,  G09G2320/0223

Abstract: A liquid crystal display is provided which has low power consumption, and which prevents horizontal stripes from occurring without the circuitry becoming more complex. When the write voltage polarity is inverted every plurality of lines, in the n line where the polarity is inverted, the rise in the drain line waveform dulls due to the charging of the drain line. In the nnull1 line, because the drain line has been charged by the writing of the n line, waveform dullness does not occur. A difference between the write states in the two lines causes horizontal stripes. Consequently, the output enable signal is activated at the rise of the clock signal, and the gate line is activated after a predetermined time to start the writing. Therefore, writing is not performed during the period of waveform dullness, and the write state is the same across all scan lines.

公开(公告)号：US20030222840A1

公开(公告)日：2003-12-04

申请号：US10413458

申请日：2003-04-14

Applicant: NEC LCD Technologies, Ltd.

Inventor： Koichi Koga ,  Noboru Okuzono ,  Machihiko Yamaguchi

IPC: G09G003/36

CPC classification number: G09G3/3696 ,  G09G3/2074 ,  G09G3/3607 ,  G09G3/3648

Abstract: In a liquid crystal display device where each unit pixel p arranged on a liquid crystal panel 101A is constituted by a plurality of pixels p1, p2, and p3, the pixels p1, p2, and p3 are divided into sub-pixels p11 and p12, sub-pixels p21, and p22, and sub-pixels p31 and p32, respectively. The liquid crystal display device is provided with driver ICs 201 and 202 for driving the sub-pixels p11, p21, and p31, and the sub-pixels p12, p22, and p32 constituting the pixels so that different gradation-brightness value characteristics may be given. Due to this, multi-gradation display can be performed.

Abstract translation: 在配置在液晶面板101A上的各单位像素p由多个像素p1，p2，p3构成的液晶显示装置中，将像素p1，p2，p3分割为子像素p11，p12， 子像素p21和p22以及子像素p31和p32。 液晶显示装置设置有用于驱动构成像素的子像素p11，p21和p31以及子像素p12，p22和p32的驱动器IC 201和202，使得不同的灰度亮度值特性可以是 给了 由此，可以进行多层次显示。