公开(公告)号：US11193962B2

公开(公告)日：2021-12-07

申请号：US16848153

申请日：2020-04-14

Applicant: POSTECH Research and Business Development Foundation

Inventor： Jae Yoon Sim ,  Young Woo Ji

IPC: G05F3/02 ,  G01R19/165 ,  G01R19/17 ,  G05F3/10

Abstract: An electronic circuit includes first to third transistors. The first transistor has a first channel width and a first channel length and generates a first potential difference by passing an operating current based on a first operating voltage. The second transistor has a second channel width and a second channel length and generates a second potential difference based on the operating current. The third transistor generates a third potential difference based on a second operating voltage and the operating current. A sum of a level of the first operating voltage and a level of the first potential difference corresponds to a sum of a level of the second operating voltage, a level of the second potential difference, and a level of the third potential difference. The first channel width is greater than the second channel width, or the first channel length is longer than the second channel length.