公开(公告)号：US09641868B2

公开(公告)日：2017-05-02

申请号：US14629747

申请日：2015-02-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

IPC: H04N19/82 ,  H04N19/51 ,  H04N19/61 ,  H04N19/117 ,  H04N19/44 ,  H04N19/43 ,  H04N19/513

CPC classification number: H04N19/82 ,  H04N19/117 ,  H04N19/43 ,  H04N19/44 ,  H04N19/513 ,  H04N19/61

Abstract: A moving image decoding apparatus which enables reduction in the memory bandwidth and the memory access latency for the motion compensation filter coefficients for use in inter-picture prediction involving motion compensation using variable coefficients includes: a decoding unit (101) which decodes, from a coded stream, a plurality of motion compensation filter coefficients; a memory (109) for holding the motion compensation filter coefficients included in the coded stream; a filter coefficient storage unit (103) for holding at least one of the motion compensation filter coefficients which is required for the motion compensation; a motion compensation unit (107) which performs motion compensation using the required motion compensation filter coefficient held in the filter coefficient storage unit; and a filter coefficient transfer control unit (102) which writes, in the memory, the motion compensation filter coefficients decoded by the decoding unit, and transfers the required motion compensation filter coefficient from the memory to the filter coefficient storage unit, only when the required coefficient is not yet stored therein.

公开(公告)号：US11941404B2

公开(公告)日：2024-03-26

申请号：US17375574

申请日：2021-07-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshiteru Hayashi

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3887 ,  G06F9/3001 ,  G06F9/30032 ,  G06F9/30109

Abstract: A processor performs, in accordance with a single instruction, multiplication processing and comparison processing. The multiplication processing includes obtaining a multiplication result by multiplying together a first data element and a first value. The comparison processing includes comparing the multiplication result with a second data element. The first data element is stored in a first register, the second data element is stored in a second register, and the first value is stored in a third register.

公开(公告)号：US12147686B2

公开(公告)日：2024-11-19

申请号：US18122950

申请日：2023-03-17

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hiroki Monta ,  Yoshiteru Hayashi

IPC: G06F12/00 ,  G06F3/06

Abstract: A data storage system is a data storage system which is mounted on a moving body. The data storage system includes: a plurality of ECUs which are connected to a network in the moving body; a shared storage device into which data is writable by each of the plurality of ECUs; and a shared priority controller which is connected between the plurality of ECUs and the shared storage device, and controls an order of priority in which data is written into the shared storage device from each of the plurality of ECUs.