公开(公告)号：US20200007121A1

公开(公告)日：2020-01-02

申请号：US16570173

申请日：2019-09-13

Applicant: QUALCOMM Incorporated

Inventor： Burt Lee PRICE ,  Dhaval SHAH

IPC: H03K17/22 ,  H03K17/284 ,  H03F1/02

Abstract: A system is disclosed. The system includes a first stage configured to receive VIN and VREF, the first stage including an input transistor pair, wherein the input voltage is coupled to the input transistor pair, the input transistor pair is coupled to ground, and the input transistor pair includes at a common drain a high-gain node having a voltage VHGN. The system further include a second stage coupled to the high-gain node and configured to generate VOUT based on a difference between VIN and VREF, the second stage comprising a resistor and an inverter transistor pair, wherein the gates of the inverter transistor pair are coupled to the high-gain node of the first stage and the resistor couples the high-gain node of first stage to a common drain of the inverter transistor pair and is configured to provide and/or draw current to and/or from the high-gain node of first stage.

公开(公告)号：US20170045901A1

公开(公告)日：2017-02-16

申请号：US14827239

申请日：2015-08-14

Applicant: QUALCOMM Incorporated

Inventor： Burt Lee PRICE ,  Dhaval Rajeshbhai SHAH ,  Jonathan LIU

IPC: G05F1/575

CPC classification number: G05F1/56 ,  G05F1/565 ,  G05F1/575

Abstract: Systems and methods relate to extending life of a low-dropout (LDO) voltage regulator. A differential amplifier of the LDO voltage regulator includes switches that can be selectively turned on or off. When the LDO voltage regulator is bypassed or turned off (or not active), a first switch is turned on to selectively couple gates of a first input transistor and a second input transistor of the differential amplifier, to maintain the gates at a same voltage. The first switch is turned off to decouple the gates when the LDO voltage regulator is active. Further, a second switch can be turned on or off to selectively couple or decouple, respectively, the gate of the second input transistor to an output voltage of the LDO voltage regulator, based on whether the LDO voltage regulator is active or not active, respectively.

Abstract translation: 系统和方法涉及延长低压差（LDO）稳压器的寿命。 LDO稳压器的差分放大器包括可以选择性地打开或关闭的开关。 当LDO电压调节器旁路或关断（或未激活）时，第一开关导通以选择性地耦合差分放大器的第一输入晶体管和第二输入晶体管的栅极，以将栅极保持在相同的电压。 当LDO稳压器有效时，第一个开关被关闭以去耦栅极。 此外，可以基于LDO电压调节器是有效还是不工作，分别将第二输入晶体管的栅极选择性地耦合或去耦合到LDO稳压器的输出电压，第二开关可以导通或截止 。

公开(公告)号：US20170083031A1

公开(公告)日：2017-03-23

申请号：US14860717

申请日：2015-09-22

Applicant: QUALCOMM Incorporated

Inventor： Francois Ibrahim ATALLAH ,  Hoan Huu NGUYEN ,  Keith Alan BOWMAN ,  Yeshwant Nagaraj KOLLA ,  Burt Lee PRICE ,  Samantak GANGOPADHYAY

IPC: G05F1/56

CPC classification number: G05F1/56 ,  H03K19/0008

Abstract: Systems and methods relate to a low-dropout voltage (LDO) voltage regulator which receives a maximum supply voltage and provides a regulated voltage to a load, where the load may be a processing core of a multi-core processing system. A leakage current supply source includes a leakage current sensor to determine a leakage current demand of the load of the LDO voltage regulator and a leakage current supply circuit to supply the leakage current demand. In this manner, the leakage current supply source provides current assistance to the LDO voltage regulator, such that the LDO voltage regulator can supply only dynamic current. Thus, headroom voltage of the LDO voltage regulator, which is a difference between the maximum supply voltage and the regulated voltage, can be reduced. Reducing the headroom voltage allows greater number of dynamic voltage and frequency scaling states of the load.

公开(公告)号：US20210203224A1

公开(公告)日：2021-07-01

申请号：US17203569

申请日：2021-03-16

Applicant: QUALCOMM Incorporated

Inventor： Burt Lee PRICE ,  Wenjun YUN

IPC: H02M3/155 ,  G01R19/25 ,  H02M1/088 ,  H03F3/45 ,  H03K5/24

Abstract: Current sensing in an on-die direct current-direct current (DC-DC) converter for measuring delivered power is disclosed. A DC-DC converter converts input voltage to output current at an output voltage coupled to a load circuit. The DC-DC converter includes a high side driver (HSD) circuit to drive the output current in a first stage, and a low side driver (LSD) circuit to couple the power output to a negative supply rail (GND) in a second phase, output current being periodic. The DC-DC converter includes an amplifier circuit to equalize an output voltage and a mirror voltage. Based on the mirror voltage, the current sensing circuit generates mirror current that corresponds to driver current. The mirror current can be measured as a representation of the output current delivered to the load circuit. A plurality of the DC-DC converters can provide multi-phased current to the load circuit for providing power to the load circuit.