公开(公告)号：US20240169018A1

公开(公告)日：2024-05-23

申请号：US17989448

申请日：2022-11-17

Applicant: QUALCOMM Incorporated

Inventor： Hamza OMAR ,  Engin IPEK ,  Bohuslav RYCHLIK ,  Luca MARONCELLI

IPC: G06F17/16 ,  G06F7/544

CPC classification number: G06F17/16 ,  G06F7/5443

Abstract: An apparatus, including: a memory; a matrix multiplier engine, comprising: an array of multiplier-accumulate units (MAUs) comprising: a first set of accumulators; and a second set of accumulators; and a controller configured to concurrently: cause a first set of resultant values in the first set of accumulators to be transferred to the memory pursuant to a first set of store instructions, wherein the first set of resultant values was generated pursuant to a first set of multiply-accumulate (MAC) operations performed by the set of multipliers and the first set of accumulators; and cause the set of multipliers and the second set of accumulators to perform a second set of MAC operations.