EXTRACTING CLOCK INFORMATION FROM A SERIAL COMMUNICATIONS BUS FOR USE IN RF COMMUNICATIONS CIRCUITRY
    1.
    发明申请
    EXTRACTING CLOCK INFORMATION FROM A SERIAL COMMUNICATIONS BUS FOR USE IN RF COMMUNICATIONS CIRCUITRY 有权
    从RF通信电路中使用的串行通信总线提取时钟信息

    公开(公告)号:US20130294554A1

    公开(公告)日:2013-11-07

    申请号:US13937307

    申请日:2013-07-09

    CPC classification number: H04L7/04 G06F13/385 H04J3/0685

    Abstract: The present disclosure relates to RF front-end (RFFE) circuitry that includes multiple RFFE circuits, each of which may be provided by a separate integrated circuit (IC), front-end module, or both. As such, the RFFE circuits may be connected to one another using an RFFE serial communications bus. Further, one or more of the RFFE circuits may need an accurate clock source for analog-to-digital conversion (ADC), digital-to-analog conversion (DAC), calibration, sensor measurements, or the like. Instead of including an integral clock source circuit or receiving a separate external clock signal, an RFFE circuit may extract clock information from the RFFE serial communications bus to provide one or more clock signals. The clock information may be associated with one or more serial communications commands via the RFFE serial communications bus, may be associated with alternate functionality of the RFFE serial communications bus, or both.

    Abstract translation: 本公开涉及包括多个RFFE电路的RF前端(RFFE)电路,每个RFFE电路可以由单独的集成电路(IC),前端模块或两者提供。 因此,RFFE电路可以使用RFFE串行通信总线彼此连接。 此外,一个或多个RFFE电路可能需要用于模数转换(ADC),数模转换(DAC),校准,传感器测量等的精确时钟源。 RFFE电路不是包含集成时钟源电路或者接收单独的外部时钟信号,而是可以从RFFE串行通信总线提取时钟信息以提供一个或多个时钟信号。 时钟信息可以经由RFFE串行通信总线与一个或多个串行通信命令相关联,可以与RFFE串行通信总线或两者的备用功能相关联。

    Extracting clock information from a serial communications bus for use in RF communications circuitry
    2.
    发明授权
    Extracting clock information from a serial communications bus for use in RF communications circuitry 有权
    从串行通信总线提取时钟信息,用于RF通信电路

    公开(公告)号:US08774735B2

    公开(公告)日:2014-07-08

    申请号:US13937307

    申请日:2013-07-09

    CPC classification number: H04L7/04 G06F13/385 H04J3/0685

    Abstract: The present disclosure relates to RF front-end (RFFE) circuitry that includes multiple RFFE circuits, each of which may be provided by a separate integrated circuit (IC), front-end module, or both. As such, the RFFE circuits may be connected to one another using an RFFE serial communications bus. Further, one or more of the RFFE circuits may need an accurate clock source for analog-to-digital conversion (ADC), digital-to-analog conversion (DAC), calibration, sensor measurements, or the like. Instead of including an integral clock source circuit or receiving a separate external clock signal, an RFFE circuit may extract clock information from the RFFE serial communications bus to provide one or more clock signals. The clock information may be associated with one or more serial communications commands via the RFFE serial communications bus, may be associated with alternate functionality of the RFFE serial communications bus, or both.

    Abstract translation: 本公开涉及包括多个RFFE电路的RF前端(RFFE)电路,每个RFFE电路可以由单独的集成电路(IC),前端模块或两者提供。 因此,RFFE电路可以使用RFFE串行通信总线彼此连接。 此外,一个或多个RFFE电路可能需要用于模数转换(ADC),数模转换(DAC),校准,传感器测量等的精确时钟源。 RFFE电路不是包含集成时钟源电路或者接收单独的外部时钟信号,而是可以从RFFE串行通信总线提取时钟信息以提供一个或多个时钟信号。 时钟信息可以经由RFFE串行通信总线与一个或多个串行通信命令相关联,可以与RFFE串行通信总线或两者的备用功能相关联。

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