公开(公告)号：US20240170398A1

公开(公告)日：2024-05-23

申请号：US18511535

申请日：2023-11-16

Applicant: Renesas Electronics Corporation

Inventor： Hiromichi TAKAOKA ,  Yoshiyuki SATO ,  Yuki FUJIMOTO

IPC: H01L23/525

CPC classification number: H01L23/5256

Abstract: The dielectric film IF is disposed on the semiconductor substrate SB, and the plurality of electric fuse portions FU are disposed on the dielectric film IF. The n-type first well region WL1 is disposed in the semiconductor substrate SB and on the surface of the semiconductor substrate SB. The first well region WL1 is formed by integrally connecting the well region WLa located under each of the plurality of electric fuse portions FU to each other.