公开(公告)号：US20240134742A1

公开(公告)日：2024-04-25

申请号：US18533281

申请日：2023-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Boram HWANG ,  Chulmin KIM ,  Hyunjoon CHA

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/1016 ,  G06F11/076 ,  G06F11/1068

Abstract: According to various embodiments, an electronic device comprises: at least one processor; and memory operatively connected to the at least one processor, wherein the memory may store instructions which, when executed by the at least one processor, cause the electronic device to: obtain, from a kernel, at least one address for a first memory area accessible through the kernel; store the at least one address in a second memory area accessible through a hypervisor; based on obtaining an address stored in a kernel stack from the kernel, identify whether the obtained address is defective, on the basis of the at least one stored address; and restore the defective address using at least one address stored in the second memory area in response to identifying the defect in the address.

公开(公告)号：US20210042125A1

公开(公告)日：2021-02-11

申请号：US16911907

申请日：2020-06-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Joon CHA ,  Hyunchul SEOK ,  Daehyun CHO ,  Mooncheol KANG ,  Sangmin YI ,  Hyunkyu LEE ,  Boram HWANG

IPC: G06F9/38 ,  G06F9/455

Abstract: In various embodiments, an electronic device may include: a processor including a plurality of cores, and a memory connected to the processor. The memory may store instructions which, when executed, cause the processor to, based on an abort of an execution of an instruction in a first core among the plurality of cores, determine whether a second core capable of executing the instruction exists in the plurality of cores, and to transfer the execution of the instruction to the second core, based at least on determining that the second core exists among the plurality of cores.

公开(公告)号：US20240232006A9

公开(公告)日：2024-07-11

申请号：US18533281

申请日：2023-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Boram HWANG ,  Chulmin KIM ,  Hyunjoon CHA

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/1016 ,  G06F11/076 ,  G06F11/1068

Abstract: According to various embodiments, an electronic device comprises: at least one processor; and memory operatively connected to the at least one processor, wherein the memory may store instructions which, when executed by the at least one processor, cause the electronic device to: obtain, from a kernel, at least one address for a first memory area accessible through the kernel; store the at least one address in a second memory area accessible through a hypervisor; based on obtaining an address stored in a kernel stack from the kernel, identify whether the obtained address is defective, on the basis of the at least one stored address; and restore the defective address using at least one address stored in the second memory area in response to identifying the defect in the address.