公开(公告)号：US20190383875A1

公开(公告)日：2019-12-19

申请号：US16552109

申请日：2019-08-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HA-YOUNG KIM ,  SUNG-WEE CHO ,  DAL-HEE LEE ,  JAE-HA LEE

IPC: G01R31/3185 ,  H03K3/3562

Abstract: A scan flip-flop includes an input unit and a flip-flop. The input unit is configured to select one signal from among a data input signal and a scan input signal to supply the selected one signal as an internal signal according to an operation mode. The flip-flop is configured to latch the internal signal according to a clock signal. The flip-flop includes a cross coupled structure that includes first and second tri-state inverters which share a first output node and face each other.

公开(公告)号：US20170328954A1

公开(公告)日：2017-11-16

申请号：US15663852

申请日：2017-07-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HA-YOUNG KIM ,  SUNG-WEE CHO ,  DAL-HEE LEE ,  JAE-HA LEE

IPC: G01R31/3185 ,  H03K3/3562

CPC classification number: G01R31/318541 ,  H03K3/35625

Abstract: A scan flip-flop includes an input unit and a flip-flop. The input unit is configured to select one signal from among a data input signal and a scan input signal to supply the selected one signal as an internal signal according to an operation mode. The flip-flop is configured to latch the internal signal according to a clock signal. The flip-flop includes a cross coupled structure that includes first and second tri-state inverters which share a first output node and face each other.