公开(公告)号：US20230225113A1

公开(公告)日：2023-07-13

申请号：US17959634

申请日：2022-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaewon NA ,  Sungsam LEE ,  Taiuk RIM ,  Byungha KANG ,  Kanghyun KIM

IPC: H01L27/108

CPC classification number: H01L27/10814

Abstract: A semiconductor device includes a substrate including first and second active regions; a bitline structure extending in one direction on the substrate, the bitline structure being electrically connected to the first active region; a storage node contact on a sidewall of the bitline structure, the storage node contact being electrically connected to the second active region; a spacer structure between the bitline structure and the storage node contact; a landing pad on the storage node contact, the landing pad being in contact with a sidewall of the spacer structure; and a capacitor structure electrically connected to the landing pad, wherein the spacer structure includes a first spacer, a second spacer, a third spacer, and a fourth spacer, sequentially stacked on the sidewall of the bitline structure, the second spacer is an air spacer, and the third spacer has a thickness that is less than a thickness of the first spacer.