公开(公告)号：US20220368328A1

公开(公告)日：2022-11-17

申请号：US17569041

申请日：2022-01-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaemin CHOI ,  Yonghun KIM ,  Jinhyeok BAEK ,  Yoochang SUNG ,  Changsik YOO ,  Jeongdon IHM

IPC: H03K19/003 ,  G11C7/22 ,  G11C5/14 ,  H03K19/0185

Abstract: An interface circuit includes: a buffer circuit configured to receive an input signal and to generate an output signal having a delay time, the delay time being determined based on a current level of a bias current and a voltage level of a power supply voltage; and a bias generation circuit configured to vary a voltage level of a bias control voltage so that the delay time is constant by compensating for a change in the voltage level of the power supply voltage, the bias generation circuit being further configured to provide the bias control voltage to the buffer circuit.