公开(公告)号：US20230139252A1

公开(公告)日：2023-05-04

申请号：US17881032

申请日：2022-08-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hwan LEE ,  Ki Seok LEE ,  Sang Ho LEE

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining a cell active area in a substrate. A plurality of buried contacts is electrically connected with the substrate and arranged in a first direction. A bit line structure extends in a second direction between adjacent buried contacts of the plurality of buried contacts. The bit line structure includes a bit line pass portion and a bit line contact portion. The bit line structure is electrically connected with the cell active area. A first buffer pattern is disposed between the substrate and the bit line pass portion. The first buffer pattern has a T-shape in a cross-section taken along the first direction.