公开(公告)号：US20220418095A1

公开(公告)日：2022-12-29

申请号：US17396803

申请日：2021-08-09

Applicant: SFI ELECTRONICS TECHNOLOGY INC.

Inventor： CHING HOHN LIEN ,  HUNG TSUNG HSU ,  CHIH HSIEN HSU ,  CHENG HSIEN CHIU ,  HSING-TSAI HUANG

IPC: H05K1/02 ,  H05K9/00

Abstract: ESD suppressor and manufacturing method thereof. The ESD suppressor include at least two printed circuit boards, one insulating frame, two terminal electrodes and two or more interior electrodes. The insulating frame is positioned between the two printed circuit boards, so as to form a main structure with a cavity. For each printed circuit board, at least one interior electrode is positioned on the surface facing the cavity and separated from other interior electrode(s). Two terminal electrodes are positioned on two different surfaces of the main structure and electrically connected to different interior electrodes respectively. Optionally, the insulating frame is a hallowed out printed circuit board or a frame formed by printing insulating material. In the manufacturing method, the thickness of the insulating frame is adjusted to adjust the relative distance between different printed circuit boards, so as to further adjust the breakdown voltage of the ESD suppressor