公开(公告)号：US20140189162A1

公开(公告)日：2014-07-03

申请号：US13731253

申请日：2012-12-31

Applicant: SILICON LABORATORIES INC.

Inventor： Xiaohui Wang ,  Paul I. Zavalney

IPC: G06F3/06 ,  G06F13/28

CPC classification number: G06F13/28 ,  G06F13/4221 ,  H02M1/38 ,  H02M7/5395 ,  H02M2001/0012

Abstract: An apparatus includes an input/output (I/O) interface circuit that includes a memory and a controller. The memory stores a plurality of commands to regulate an input/output (I/O) interface. The commands indicate at least one I/O state of at least one I/O terminal of the I/O interface circuit and a time duration that is associated with the I/O state. The controller executes the commands to place the I/O interface in the the I/O state(s) in a predetermined sequence.

Abstract translation: 一种装置包括包括存储器和控制器的输入/输出（I / O）接口电路。 存储器存储多个命令以调节输入/输出（I / O）接口。 这些命令指示I / O接口电路的至少一个I / O端子的至少一个I / O状态和与I / O状态相关联的持续时间。 控制器执行命令，以预定的顺序将I / O接口置于I / O状态。

公开(公告)号：US10078600B2

公开(公告)日：2018-09-18

申请号：US13926629

申请日：2013-06-25

Applicant: Silicon Laboratories Inc.

Inventor： Paul I Zavalney ,  Xiaohui Wang

IPC: G06F13/12

CPC classification number: G06F13/126

Abstract: An apparatus includes a memory, and a control circuit. The memory stores a vector that identifies a signal that is to be provided by an input/output (I/O) interface to a peripheral and indicates a time value. The control circuit is adapted to process the vector and route the identified signal to the peripheral and regulate a time that the signal is routed to the peripheral based on the time value.

公开(公告)号：US20140379945A1

公开(公告)日：2014-12-25

申请号：US13926629

申请日：2013-06-25

Applicant: Silicon Laboratories Inc.

Inventor： Paul I. Zavalney ,  Xiaohui Wang

IPC: G06F3/00

CPC classification number: G06F13/126

Abstract: An apparatus includes a memory, and a control circuit. The memory stores a vector that identifies a signal that is to be provided by an input/output (I/O) interface to a peripheral and indicates a time value. The control circuit is adapted to process the vector and route the identified signal to the peripheral and regulate a time that the signal is routed to the peripheral based on the time value.

Abstract translation: 一种装置包括存储器和控制电路。 存储器存储一个矢量，该矢量标识由外设输入/输出（I / O）接口提供的信号，并指示时间值。 控制电路适于处理该矢量并且将识别的信号路由到外围设备，并根据时间值调节信号被路由到外围设备的时间。

公开(公告)号：US08954632B2

公开(公告)日：2015-02-10

申请号：US13731253

申请日：2012-12-31

Applicant: Silicon Laboratories Inc.

Inventor： Xiaohui Wang ,  Paul I. Zavalney

IPC: G06F13/28 ,  G06F13/00

CPC classification number: G06F13/28 ,  G06F13/4221 ,  H02M1/38 ,  H02M7/5395 ,  H02M2001/0012

Abstract: An apparatus includes an input/output (I/O) interface circuit that includes a memory and a controller. The memory stores a plurality of commands to regulate an input/output (I/O) interface. The commands indicate at least one I/O state of at least one I/O terminal of the I/O interface circuit and a time duration that is associated with the I/O state. The controller executes the commands to place the I/O interface in the the I/O state(s) in a predetermined sequence.

Abstract translation: 一种装置包括包括存储器和控制器的输入/输出（I / O）接口电路。 存储器存储多个命令以调节输入/输出（I / O）接口。 这些命令指示I / O接口电路的至少一个I / O端子的至少一个I / O状态和与I / O状态相关联的持续时间。 控制器执行命令，以预定的顺序将I / O接口置于I / O状态。