公开(公告)号：US09425781B2

公开(公告)日：2016-08-23

申请号：US14231133

申请日：2014-03-31

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Tapas Nandy ,  Anchal Jain

IPC: H03K9/08

CPC classification number: H03K9/08

Abstract: A PWM receiver circuit receives and demodulates pulse width modulated (PWM) data signals without requiring synchronization such that no synchronization preamble need be provided with the PWM data signal. Embodiments may consume less power since there is no need to repeatedly synchronize a PLL, counter or other circuitry to the PWM data signal. Furthermore, the PWM receiver circuit operates in view of or is “tolerant” to jitter in the frequency of the PWM signal and also to a relatively wide range of intentional variation in the frequency. Interleaved operation of parallel PWM receiver circuits are utilized in some embodiments. In one embodiment currents are integrated during low and high portions of the duty cycle of the PWM data signal and the difference in the respective voltages generated through such integration used to demodulate the PWM data signal.

Abstract translation: PWM接收器电路接收和解调脉宽调制（PWM）数据信号而不需要同步，使得不需要向PWM数据信号提供同步前同步码。 实施例可以消耗更少的功率，因为​​不需要将PLL，计数器或其他电路重复同步到PWM数据信号。 此外，PWM接收器电路在PWM信号的频率中考虑到或者“容忍”抖动以及频率的有意变化的相对宽的范围。 在一些实施例中，采用并行PWM接收器电路的交织操作。 在一个实施例中，在PWM数据信号的占空比的低和高部分集成电流，并且通过这样的积分产生的各个电压的差用于解调PWM数据信号。