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公开(公告)号:US20170147416A1
公开(公告)日:2017-05-25
申请号:US14951639
申请日:2015-11-25
Inventor: Om RANJAN , Fabio Enrico Carlo DISEGNI
IPC: G06F11/07
CPC classification number: G06F11/079 , G06F11/073 , G06F11/0751 , G06F11/076 , G06F11/0772 , G06F11/08 , G06F11/1004 , G06F11/16 , G11B2020/1843 , G11C29/02 , G11C29/04 , G11C29/42
Abstract: An electronic device includes a memory having memory locations being subject to transient faults and permanent faults, and a fault detection circuit coupled to the memory. The fault detection circuit is configured to read the memory locations at a first time, and determine a first fault count and fault map signature including the transient and permanent faults at the first time based upon reading the plurality of memory locations, and to store the first fault count and fault map signature. The fault detection circuit is configured to read the memory locations at a second time and determine a second fault count and fault map signature including the transient and permanent faults at the second time based upon reading the memory locations, and compare the stored first fault count and fault map signature with the second fault count and fault map signature to determine a permanent fault count.
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公开(公告)号:US20190317851A1
公开(公告)日:2019-10-17
申请号:US16454365
申请日:2019-06-27
Inventor: Om RANJAN , Riccardo GEMELLI , Abhishek GUPTA
Abstract: A memory includes error correction circuitry that receives a data packet, outputs a correctable error flag indicating presence or absence of a correctable error in the data packet, and outputs an uncorrectable error flag indicating presence or absence of an uncorrectable error in the data packet. A response manager, operating in availability mode, generates output indicating that a correctable error was present if the correctable error flag indicates presence thereof, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof. In a coverage mode, the response manager generates an output indicating that a correctable error was potentially present but should be treated as an uncorrectable error if the correctable error flag indicates presence of the correctable error, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof.
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公开(公告)号:US20190258493A1
公开(公告)日:2019-08-22
申请号:US16273704
申请日:2019-02-12
Inventor: Roberto Colombo , Om RANJAN
Abstract: A processing system includes a plurality of configuration data clients, each associated with a respective address and including a respective register, and where a respective configuration data client is configured to receive a respective first configuration data and to store the respective first configuration data in the respective register; a hardware block coupled to at least one of the configuration data clients and configured to change operation as a function of the respective first configuration data stored in the respective registers; a non-volatile memory including second configuration data, where the second configuration data are stored as data packets including the respective first configuration data and an attribute field identifying the respective address of one of the configuration data clients; and a hardware configuration circuit configured to sequentially read the data packets from the non-volatile memory and to transmit the respective first configuration data to the respective configuration data client.
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