公开(公告)号：US20040046192A1

公开(公告)日：2004-03-11

申请号：US10454361

申请日：2003-06-04

Applicant: STMICROELECTRONICS S.A. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE

Inventor： Damien Lenoble ,  Isabelle Guilmeau

IPC: H01L029/76

CPC classification number: H01L29/6659 ,  H01L21/2652 ,  H01L29/6656

Abstract: Process for fabricating a transistor comprises producing source and drain extension regions, consisting in forming a gate region on a semiconductor substrate and in implanting dopants into the semiconductor substrate on either side of and at a certain distance from the gate of the transistor. The producing of the source and drain extension regions consists in forming an intermediate layer (Cl) on the sidewalls of the gate (GR) and on the surface of the semiconductor substrate. This intermediate layer is formed from a material that is less dense than silicon dioxide. The implantation of dopants (IMP) is carried out through that part of the intermediate layer that is located on the semiconductor substrate.

Abstract translation: 用于制造晶体管的工艺包括产生源极和漏极延伸区域，其包括在半导体衬底上形成栅极区域，并且在晶体管的栅极的任一侧和距离晶体管的栅极的任意一侧离开半导体衬底中注入掺杂剂。 源极和漏极延伸区域的产生在于在栅极（GR）的侧壁上和半导体衬底的表面上形成中间层（Cl）。 该中间层由比二氧化硅致密的材料形成。 掺杂剂（IMP）的注入通过位于半导体衬底上的部分中间层进行。