System and method for encoding constant operands in a wide issue processor
    1.
    发明申请
    System and method for encoding constant operands in a wide issue processor 有权
    用于在广泛问题处理器中对常量操作数进行编码的系统和方法

    公开(公告)号:US20020087834A1

    公开(公告)日:2002-07-04

    申请号:US09751408

    申请日:2000-12-29

    Abstract: For use in a data processor comprising an instruction execution pipeline comprising N processing stages, a system and method of encoding constant operands is disclosed. The system comprises a constant generator unit that is capable of generating both short constant operands and long constant operands. The constant generator unit extracts the bits of a short constant operand from an instruction syllable and right justifies the bits in an output syllable. For long constant operands, the constant generator unit extracts K low order bits from an instruction syllable and T high order bits from an extension syllable. The right justified K low order bits and the T high order bits are combined to represent the long constant operand in one output syllable. In response to the status of op code bits located within a constant generation instruction, the constant generator unit enables and disables multiplexers to automatically generate the appropriate short or long constant operand.

    Abstract translation: 为了在包括N个处理级的指令执行流水线的数据处理器中使用,公开了对常数操作数进行编码的系统和方法。 该系统包括能够产生短常数操作数和长常数操作数的恒定发电机单元。 常数发生器单元从指令音节中提取短常量操作数的位,右对齐输出音节中的位。 对于长常数操作数,常数发生器单元从扩展音节从指令音节和T高位比特提取K个低位比特。 右对齐K低位位和T高位位组合以表示一个输出音节中的长常数操作数。 响应于位于恒定生成指令内的操作码位的状态,常数发生器单元启用和禁用多路复用器自动生成适当的短或长常数操作数。

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