公开(公告)号：US20230325336A1

公开(公告)日：2023-10-12

申请号：US18133214

申请日：2023-04-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas SAUX ,  Sebastien METZGER ,  Herve CASSAGNES

IPC: G06F13/40 ,  G06F1/24 ,  G06F1/10

CPC classification number: G06F13/405 ,  G06F1/24 ,  G06F1/10 ,  G06F2213/0038

Abstract: The system on a chip includes at least a first digital domain configured to be reinitialized by a first reinitialization signal, a second digital domain and an interface circuit. The interface circuit includes a starting register in the first digital domain, a destination register in the second digital domain and a synchronization circuit in the first digital domain. The interface circuit is configured to transfer data from the starting register to the destination register upon command of a control signal transmitted by the synchronization circuit. The starting register and the synchronization circuit are configured to not be reinitialized by the first reinitialization signal.