Abstract:
A driver circuit includes a high-side power transistor having a source-drain path coupled between a first node and a second node and a low-side power transistor having a source-drain path coupled between the second node and a third node. A high-side drive circuit, having an input configured to receive a drive signal, includes an output configured to drive a control terminal of said high-side power transistor. The high-side drive circuit is configured to operate as a capacitive driver. A low-side drive circuit, having an input configured to receive a complement drive signal, includes an output configured to drive a control terminal of said low-side power transistor. The low-side drive circuit is configured to operate as a level-shifting driver.
Abstract:
A driver circuit includes a high-side power transistor having a source-drain path coupled between a first node and a second node and a low-side power transistor having a source-drain path coupled between the second node and a third node. A high-side drive circuit, having an input configured to receive a drive signal, includes an output configured to drive a control terminal of said high-side power transistor. The high-side drive circuit is configured to operate as a capacitive driver. A low-side drive circuit, having an input configured to receive a complement drive signal, includes an output configured to drive a control terminal of said low-side power transistor. The low-side drive circuit is configured to operate as a level-shifting driver.
Abstract:
A driver circuit includes a high-side power transistor having a source-drain path coupled between a first node and a second node and a low-side power transistor having a source-drain path coupled between the second node and a third node. A high-side drive circuit, having an input configured to receive a drive signal, includes an output configured to drive a control terminal of said high-side power transistor. The high-side drive circuit is configured to operate as a capacitive driver. A low-side drive circuit, having an input configured to receive a complement drive signal, includes an output configured to drive a control terminal of said low-side power transistor. The low-side drive circuit is configured to operate as a level-shifting driver.
Abstract:
A driver circuit includes a high-side power transistor having a source-drain path coupled between a first node and a second node and a low-side power transistor having a source-drain path coupled between the second node and a third node. A high-side drive circuit, having an input configured to receive a drive signal, includes an output configured to drive a control terminal of said high-side power transistor. The high-side drive circuit is configured to operate as a capacitive driver. A low-side drive circuit, having an input configured to receive a complement drive signal, includes an output configured to drive a control terminal of said low-side power transistor. The low-side drive circuit is configured to operate as a level-shifting driver.
Abstract:
A power converter includes an input and an output with an energy storage circuit and a power switching circuit coupled between the input and the output. A feedback circuit generates a feedback voltage which is differentially compared to a reference in an error amplifier circuit to generate an error amplification signal. A comparator circuit generates a control signal for controlling on/off of the power switching circuit based on a first comparison signal related to the error amplification signal and a second comparison signal related to a charging current of the energy storage circuit. A regulating circuit is coupled between an output of the error amplifier circuit and an input of the comparator circuit for receiving the first comparison signal, the regulating circuit is configured to couple a voltage compensation signal related to an input voltage received by the input to an output of the error amplifier, so as to reduce a variation amount of the error amplification signal when the input voltage varies.
Abstract:
A power converter includes an input and an output with an energy storage circuit and a power switching circuit coupled between the input and the output. A feedback circuit generates a feedback voltage which is differentially compared to a reference in an error amplifier circuit to generate an error amplification signal. A comparator circuit generates a control signal for controlling on/off of the power switching circuit based on a first comparison signal related to the error amplification signal and a second comparison signal related to a charging current of the energy storage circuit. A regulating circuit is coupled between an output of the error amplifier circuit and an input of the comparator circuit for receiving the first comparison signal, the regulating circuit is configured to couple a voltage compensation signal related to an input voltage received by the input to an output of the error amplifier, so as to reduce a variation amount of the error amplification signal when the input voltage varies.