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公开(公告)号:US20240012871A1
公开(公告)日:2024-01-11
申请号:US17859769
申请日:2022-07-07
Inventor: Antonio DE VITA , Thomas BOESCH , Giuseppe DESOLI
CPC classification number: G06F17/15 , G06F7/5443
Abstract: A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and iteration control circuitry. The convolutional accelerator, in operation, convolves a kernel with a streaming feature data tensor. The convolving includes decomposing the kernel into a plurality of sub-kernels and iteratively convolving the sub-kernels with respective sub-tensors of the streamed feature data tensor. The iteration control circuitry, in operation, defines respective windows of the streamed feature data tensors, the windows corresponding to the sub-tensors.
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2.
公开(公告)号:US20240354269A1
公开(公告)日:2024-10-24
申请号:US18304938
申请日:2023-04-21
Applicant: STMicroelectronics International N.V.
Inventor: Antonio DE VITA , Thomas BOESCH , Giuseppe DESOLI
IPC: G06F13/374 , G06F9/50
CPC classification number: G06F13/374 , G06F9/5077 , G06F2209/5011
Abstract: A stream switch includes a data router, configuration registers, and arbitration logic. The data router has a plurality of input ports, each having a plurality of associated virtual input channels, and a plurality of output ports, each having a plurality of associated virtual output channels. The data router transmits data streams from input ports to one or more output ports of the plurality of output ports. The configuration registers store configuration data associated with the virtual output channels of the respective output ports of the plurality of output ports. The stored configuration data identifies a source input port and virtual input channel ID associated with the virtual output channel of the output port. The arbitration logic allocates bandwidth of the data router based on request signals associated with virtual input channels of the input ports and the configuration data associated with the virtual output channels.
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