公开(公告)号：US20240331768A1

公开(公告)日：2024-10-03

申请号：US18619699

申请日：2024-03-28

Applicant: STMicroelectronics International N.V.

Inventor： Praveen Kumar VERMA ,  Ashfaque AHMED

IPC: G11C11/419 ,  G11C11/418

CPC classification number: G11C11/419 ,  G11C11/418

Abstract: An electronic device includes a memory and includes a plurality of word lines selectively driven by a decoder, with each pair of adjacent word lines having an underdrive circuit coupled therebetween. That underdrive circuit includes first and second transistors source/drain coupled in series with one another between the pair of adjacent word lines, the first and second transistors being replicas of a pull-down transistor and a pass gate transistor of bitcells the memory. One of the first and second transistors has its gate driven by a supply voltage and the other of the first and second transistor has its gate driven by a first read assist control signal.