公开(公告)号：US20240202148A1

公开(公告)日：2024-06-20

申请号：US18537453

申请日：2023-12-12

Applicant: STMicroelectronics International N.V.

Inventor： Jean-Christophe BATLLO ,  Zied GRISSA ,  Delphine LE GOASCOZ ,  Gwendhal BORREMANS

IPC: G06F13/28

CPC classification number: G06F13/28

Abstract: A computer system includes a central processing unit, a peripheral circuit configured to process data having a first format, a memory configured to store data intended for the peripheral circuit, the data having a second format distinct from the first format. The system includes a direct memory access controller configured, during a transmission of data from the memory towards the peripheral circuit, to recover data intended for the peripheral circuit and stored in the memory, to modify the format of the recovered data to obtain data having the first format, and to transmit the data according to the first format to the peripheral circuit. The central processing unit is configured to initialize a data transmission from the memory towards the peripheral circuit via the direct memory access controller.