公开(公告)号：US20040254969A1

公开(公告)日：2004-12-16

申请号：US10745948

申请日：2003-12-24

Applicant: STMicroelectronics N.V.

Inventor： Fabio Pisoni

IPC: G06F015/00

CPC classification number: H04L27/2662 ,  H04L27/2657

Abstract: A clock offset compensation arrangement may include a fractional interpolator for applying a trigonometric interpolation to a sampled input signal according to a clock offset signal. It uses transform-based processing in the frequency domain. Compared to a polynomial type interpolation it may be easier to implement, and may achieve a closer approximation to an ideal interpolation. It may reduce the effects of non-linear type errors introduced by truncation of higher powers. The arrangement may be applied to receivers or transmitters of multi-carrier modems, as well as other applications which use rate adaptation or synchronization.

Abstract translation: 时钟偏移补偿装置可以包括用于根据时钟偏移信号对采样的输入信号应用三角插值的分数内插器。 它在频域中使用基于变换的处理。 与多项式类型插值相比，它可能更容易实现，并且可以实现更接近于理想插值的近似。 它可以减少由截断较高功率引入的非线性类型误差的影响。 该布置可以应用于多载波调制解调器的接收机或发射机，以及使用速率适配或同步的其他应用。