公开(公告)号：US20020035679A1

公开(公告)日：2002-03-21

申请号：US09998568

申请日：2001-11-16

Applicant: STMicroelectronics S.r.I.

Inventor： Francesco Pappalardo ,  Davide Tesi ,  Francesco Nino Mammoliti ,  Francesco Bombaci

IPC: G06F009/00

CPC classification number: G06F9/30181 ,  G06F9/30003 ,  G06F9/30145

Abstract: A processor is provided with a set of instructions formed, in general, of an operation section and an operand section. For at least one of the instructions, the operand section represents operation control signals of the processor. In this way, an extension of the set of instructions can be achieved for tailoring the set of instructions to the user's own requirements. Consequently, the processor control unit should be capable of coupling its outputs to its inputs upon receiving one such instruction, thereby to transfer such internal operation control signals without interpretation.

Abstract translation: 处理器设置有一组通常由操作部分和操作数部分形成的指令。 对于至少一个指令，操作数部分表示处理器的操作控制信号。 以这种方式，可以实现该组指令的扩展，以便根据用户自己的要求定制指令集。 因此，处理器控制单元应该能够在接收到一个这样的指令时将其输出耦合到其输入，从而在没有解释的情况下传送这样的内部操作控制信号。

公开(公告)号：US20040218409A1

公开(公告)日：2004-11-04

申请号：US10746118

申请日：2003-12-24

Applicant: STMicroelectronics S.r.I.

Inventor： Francesco Bombaci ,  Alessandro Inglese

IPC: H02M003/24

CPC classification number: H02M7/53873

Abstract: A digital interface for driving at least one complementary pair of first and second power elements connected in an inverter configuration between first and second voltage references is provided. The digital interface includes a first input terminal for receiving a PWM input signal, a first counter stage connected to the first input terminal, and a second counter stage connected to an output of the first counter stage. A toggle stage is connected to the first input terminal and to an output of the second counter stage. A first output terminal is connected to an output of the toggle stage, and is to be connected to a control terminal of the first power element. A second output terminal is connected to the output of the first counter stage for receiving a delayed PWM output signal therefrom, and is to be connected to a control terminal of the second power element. The toggle stage generates a second PWM output signal for the first output terminal. The second PWM output signal is kept at a desired low level in correspondence with switching of the PWM input signal having a lower duration than a predetermined duration.

Abstract translation: 提供了用于驱动在第一和第二电压基准之间以逆变器配置连接的至少一对互补互补对的第一和第二功率元件的数字接口。 数字接口包括用于接收PWM输入信号的第一输入端，连接到第一输入端的第一计数级，以及连接到第一计数级的输出的第二计数级。 触发级连接到第一输入端子和第二计数器级的输出端。 第一输出端子连接到肘节级的输出，并且连接到第一功率元件的控制端子。 第二输出端子连接到第一计数器级的输出端，用于从其接收延迟的PWM输出信号，并且连接到第二功率元件的控制端子。 触发级产生用于第一输出端的第二PWM输出信号。 对应于具有比预定持续时间更短的持续时间的PWM输入信号的切换，第二PWM输出信号保持在期望的低电平。