Negative impedance circuit and corresponding device

    公开(公告)号:US11484910B2

    公开(公告)日:2022-11-01

    申请号:US16747197

    申请日:2020-01-20

    Abstract: A negative impedance circuit includes: a differential circuit stage; a positive feedback path from an output of the differential circuit stage to a first input of the differential circuit stage; and a negative feedback path from the output of the differential circuit stage to a second input of the differential circuit stage. The negative feedback path includes a first transistor, and a unitary gain path from the output of the differential circuit stage to the second input of the differential circuit stage, the unitary gain path coupled to ground via a reference impedance. The positive feedback path includes a second transistor. The first and second transistors are coupled in a current mirror arrangement and have respective control electrodes configured to be driven by the output of the differential circuit stage, where the negative impedance circuit causes a negative impedance at the first input of the differential circuit stage.

    Control loop and efficiency enhancement for DC-DC converters

    公开(公告)号:US12015346B2

    公开(公告)日:2024-06-18

    申请号:US17565674

    申请日:2021-12-30

    CPC classification number: H02M3/158 H02M1/0025 H02M1/08

    Abstract: A DC-DC boost converter includes an inductor coupled between an input voltage and an input node, a diode coupled between the input node and an output node, and an output capacitor coupled between the output node and ground such that an output voltage is formed across the output capacitor. A switch selectively couples the input node to ground in response to a drive signal. Control loop circuitry includes an error amplifier to generate an analog error voltage based upon a comparison of a feedback voltage to a reference voltage, the feedback voltage being indicative of the output voltage, a quantizer to quantize the analog error voltage to produce a digital error signal, and a drive voltage generation circuit to generate the drive signal as having a duty cycle based upon the digital error signal.

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