公开(公告)号：US11969757B2

公开(公告)日：2024-04-30

申请号：US17191475

申请日：2021-03-03

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Vercesi ,  Alessandro Danei ,  Giorgio Allegato ,  Gabriele Gattere ,  Roberto Campedelli

IPC: B06B1/06 ,  H10N30/01

CPC classification number: B06B1/0666 ,  H10N30/01

Abstract: A method for manufacturing a PMUT device including a piezoelectric element located at a membrane element is provided. The method includes receiving a silicon on insulator substrate having a first silicon layer, an oxide layer, and a second silicon layer. Portions of a first surface of the second silicon layer are exposed by removing exposed side portions of the first silicon layer and corresponding portions of the oxide layer, and a central portion including the remaining portions of the first silicon layer and of the oxide layer is defined. Anchor portions for the membrane element are formed at the exposed portions of the first surface of the second silicon layer. The piezoelectric element is formed above the central portion, and the membrane element is defined by selectively removing the second layer and removing the remaining portion of the oxide from under the remaining portion of the first silicon layer.