公开(公告)号：US12140982B2

公开(公告)日：2024-11-12

申请号：US17866701

申请日：2022-07-18

Applicant: STMicroelectronics S.r.l.

Inventor： Domenico Ragonese ,  Vincenzo Marano ,  Giuseppe Antonio Di Genova ,  Marco Minieri

IPC: G05F1/573

Abstract: Disclosed herein is a system including a power transistor having a first conduction terminal coupled to a supply node, a second conduction terminal coupled to an output node, and a control terminal controlled by a drive signal. The system further includes a driver configured to receive an input voltage from an external component and generate the drive signal based thereupon, and a sense circuit. The sense circuit is configured to, when the power transistor is powering a load coupled to the output node: detect whether the power transistor has entered an overload condition, and if so, determine a duration of time that the power transistor is in the overload condition; and assert a diagnostic signal in response to the duration of time being outside of a time window.