公开(公告)号：US20200256898A1

公开(公告)日：2020-08-13

申请号：US16781598

申请日：2020-02-04

Applicant: STMicroelectronics S.r.l.

Inventor： Michele VAIANA ,  Calogero Marco IPPOLITO ,  Angelo RECCHIA ,  Antonio CICERO ,  Pierpaolo LOMBARDO

IPC: G01R19/00 ,  H03F3/45 ,  H03B5/04 ,  G05F3/08 ,  H03F1/02

Abstract: An amplification interface includes an input terminal receiving a sensor current and an output terminal supplying an output voltage. An analog integrator is connected to the input terminal and supplies the output voltage. A current generator is connected to the input of the analog integrator and generates a compensation current based on a drive signal. A control circuit generates the drive signal for the current generator based on a control signal representing an offset in the sensor current supplied by the sensor. The current generator generates, based on the driving signal, a positive or negative current. The control circuit determines a first duration and a second duration as a function of the control signal representing the offset in the sensor current, during the measurement interval, and sets the driving signal to a first logic value for the first duration and to a second logic value for the second duration.

公开(公告)号：US20220377260A1

公开(公告)日：2022-11-24

申请号：US17745465

申请日：2022-05-16

Applicant: STMicroelectronics S.r.l.

Inventor： Pierpaolo LOMBARDO ,  Michele VAIANA

IPC: H04N5/33 ,  G01J5/06 ,  G01J5/20 ,  G01J5/08

Abstract: Current signals indicative of sensed physical quantities are collected from sensing transistors in an array of sensing transistors. The sensing transistors have respective control nodes and current channel paths therethrough between respective first nodes and a second node common to the sensing transistors. A bias voltage level is applied to the respective first nodes of the sensing transistors in the array and one sensing transistor in the array of sensing transistors is selected. The selected sensing transistor is decoupled from the bias voltage level, while the remaining sensing transistors in the array of sensing transistors maintain coupling to the bias voltage level. The respective first node of the selected sensing transistor in the array of sensing transistors is coupled to an output node, and an output current signal is collected from the output node.

公开(公告)号：US20220163572A1

公开(公告)日：2022-05-26

申请号：US17670858

申请日：2022-02-14

Applicant: STMicroelectronics S.r.l.

Inventor： Michele VAIANA ,  Calogero Marco IPPOLITO ,  Angelo RECCHIA ,  Antonio CICERO ,  Pierpaolo LOMBARDO

IPC: G01R19/00 ,  G05F3/08 ,  H03B5/04 ,  H03F1/02 ,  H03F3/45

Abstract: An amplification interface includes first and second differential input terminals, first and second differential output terminals providing first and second output voltages defining a differential output signal, and first and second analog integrators coupled between the first and second differential input terminals and the first and second differential output terminals, the first and second analog integrators being resettable by a reset signal. A control circuit generates the reset signal such that the first and second analog integrators are periodically reset during a reset interval and activated during a measurement interval, receives a control signal indicative of offsets in the measurement sensor current and the reference sensor current, and generates a drive signal as a function of the control signal. First and second current generators coupled first and second compensation circuits to the first and second differential input terminals as a function of a drive signal.