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公开(公告)号:US20240341129A1
公开(公告)日:2024-10-10
申请号:US18539052
申请日:2023-12-13
Applicant: Samsung Display Co., LTD.
Inventor: Yeon Ju SEO , Won Jang KI , Nam Jin KIM , Deok Young CHOI
IPC: H10K59/124 , H10K59/12 , H10K59/131 , H10K59/80
CPC classification number: H10K59/124 , H10K59/1201 , H10K59/131 , H10K59/873 , H10K2102/311
Abstract: A display device includes: a substrate including a display area, a non-display area, and a sub-region, a circuit layer, a light emitting element layer, an encapsulation layer, and a polarization layer. The non-display area includes a dam area apart from the display area and in which at least one dam portion surrounding the display area is arranged, and a junction area surrounding the dam area. The circuit layer includes a semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, a third insulating layer, a third conductive layer, a fourth insulating layer, and a fourth conductive layer. In the junction area, the encapsulation layer is disposed on the third insulating layer. A thickness of the third insulating layer at a central point of the junction area is substantially the same as a thickness of the third insulating layer in the display area.
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公开(公告)号:US20240414985A1
公开(公告)日:2024-12-12
申请号:US18443812
申请日:2024-02-16
Applicant: Samsung Display Co., LTD.
Inventor: Sunho KANG , Deok-Young CHOI , Won Jang KI
IPC: H10K59/80 , H10K59/122 , H10K59/131
Abstract: A display device includes a substrate including a display area and a non-display area, a transistor positioned in the display area, a light emitting element electrically connected to the transistor, and a common voltage transmission line positioned in the non-display area and including a depression, a transmission line, a first dam and a second dam positioned in the non-display area and spaced apart from each other and surrounding at least a portion of the display area, and a cover organic layer overlapping an edge of the recessed portion, wherein an edge of the recessed portion is positioned between the first dam and the second dam.
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公开(公告)号:US20200302875A1
公开(公告)日:2020-09-24
申请号:US16779343
申请日:2020-01-31
Applicant: Samsung Display Co., Ltd.
Inventor: Yong Sung PARK , Won Jang KI , Dae Hyun NOH , Min Su LEE , Seung Bin LEE
IPC: G09G3/3266 , G09G3/3275
Abstract: A display device includes: a display panel including a plurality of pixels; a scan driver configured to supply a scan signal to the pixels through a scan line; and a timing controller configured to control a pulse width of the scan signal according to a display luminance of the display panel.
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公开(公告)号:US20240431162A1
公开(公告)日:2024-12-26
申请号:US18443307
申请日:2024-02-16
Applicant: Samsung Display Co., Ltd.
Inventor: Deok-Young CHOI , Won Jang KI , YEONJU SEO , JOOHYE JUNG
Abstract: A display device includes a display area containing multiple pixels, and a pad area outside the display area containing multiple pads. The pads include a first conductive layer on the substrate, a second conductive layer above the first conductive layer, a third conductive layer above the second conductive layer, and a fourth conductive layer above the third conductive layer. The third conductive layer covers the side of the second conductive layer, and the display area includes multiple pixel electrodes, a fifth conductive layer located on the same layer as the third conductive layer, and a first insulating layer located between the fifth conductive layer and the pixel electrodes. No insulating layer is on the same layer as the first insulating layer between the third conductive layer and the fourth conductive layer of the pads, and the side of the third conductive layer has a smooth surface.
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公开(公告)号:US20190019441A1
公开(公告)日:2019-01-17
申请号:US15861582
申请日:2018-01-03
Applicant: Samsung Display Co., Ltd.
Inventor: Jun Cheol SHIN , Won Jang KI , Mi Jung KIM , Sang Cheon HAN
Abstract: A display device includes a base substrate which includes a display area and a peripheral area, the peripheral area including a bending area; a first test signal line and a second test signal line which are located on the peripheral area; a lower insulating layer which is located on the first test signal line and the second test signal line; a first test connection pattern which is located on the lower insulating layer and connected to the first test signal line; a second test connection pattern which is located on the lower insulating layer, spaced apart from the first test connection pattern, and connected to the second test signal line; an upper insulating layer; and a first crack detection line which is located on the upper insulating layer, is connected to the first and second test connection patterns, and has at least a portion overlapping the bending area.
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