公开(公告)号：US11636821B2

公开(公告)日：2023-04-25

申请号：US17170720

申请日：2021-02-08

Applicant: Samsung Display Co., Ltd.

Inventor： Tae-Seok Ha ,  Kyoungsoo Kim ,  Kyu-Jin Park ,  Seung-Woon Shin ,  Woon-Rok Jang ,  In-Won Jin

IPC: G09G3/36

Abstract: A gate driving circuit includes: a plurality of driving stages, each driving stage configured to provide a gate signal to a corresponding gate line among a plurality of gate lines, wherein each of the plurality of driving stages includes: a first transistor electrically connected between a first clock terminal and a gate output terminal, the first transistor including a gate electrode electrically connected to a first node, the first clock terminal to receive a first clock signal; a second transistor configured to transmit a first carry signal to the first node; and a third transistor electrically connected between the first node and a first voltage terminal, the third transistor including a gate electrode electrically connected to the first voltage terminal, the first voltage terminal to receive a first voltage, wherein the gate output terminal is electrically connected to the corresponding gate line.