DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20240365605A1

    公开(公告)日:2024-10-31

    申请号:US18426779

    申请日:2024-01-30

    Inventor: JINHO JU KIJUNE LEE

    CPC classification number: H10K59/124 H10K59/1201

    Abstract: A display panel includes a base layer including a boundary region and a pixel region, a pixel circuit including a first transistor including a first semiconductor pattern and a first gate and overlapped with the pixel region, and a plurality of insulating layers where an opening defined in the plurality of insulating layers corresponds to the boundary region. A first insulating layer of the plurality of insulating layers covers the first gate, and a groove defined in the first insulating layer is spaced apart from the opening. The groove is formed through a portion of the first insulating layer.

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20240107833A1

    公开(公告)日:2024-03-28

    申请号:US18217591

    申请日:2023-07-02

    CPC classification number: H10K59/131 H10K59/1201 H10K59/1213 H10K2102/311

    Abstract: A display panel includes: a base layer, a pixel circuit, insulating layers, an organic layer, a first signal line, and a light emitting element. The base layer includes a boundary area and a pixel area, and openings corresponding to the boundary area are defined in the insulating layers. The pixel circuit overlaps the pixel area in a plan view, and the light emitting element is disposed on a top of the insulating layers and electrically connected to the pixel circuit. The organic layer is placed to fill the opening. The first signal line does not overlap the boundary area and overlaps the pixel area in the plan view. The boundary area includes a first boundary part and a second boundary part spaced apart with the first signal line therebetween in the plan view.

    DISPLAY PANEL AND ELECTRONIC DEVICE HAVING THE SAME

    公开(公告)号:US20240357861A1

    公开(公告)日:2024-10-24

    申请号:US18425488

    申请日:2024-01-29

    CPC classification number: H10K59/1213 H10K59/131 H10K59/8792 H10K2102/311

    Abstract: A display panel includes a light emitting element, and a pixel circuit electrically connected to the light emitting element. The pixel circuit includes a semiconductor pattern layer defining a first semiconductor pattern electrically connected to the light emitting element, and a second semiconductor pattern which is spaced apart from the first semiconductor pattern, a data line on the semiconductor pattern layer and electrically connected to the second semiconductor pattern, and a connection electrode electrically connecting the first semiconductor pattern and the second semiconductor pattern which are spaced apart from each other, to each other. Along a thickness direction of the display panel, the connection electrode is a portion of a metal layer below the semiconductor pattern layer or a portion of a metal layer above the semiconductor pattern layer.

    DISPLAY DEVICE
    5.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240069593A1

    公开(公告)日:2024-02-29

    申请号:US18206808

    申请日:2023-06-07

    CPC classification number: G06F1/1618 G06F2200/1613

    Abstract: A display device includes an electronic panel including a first non-folding region, a folding region, and a second non-folding region arranged in a first direction, a support plate disposed under the electronic panel, and a hinge member that defines biaxial rotational axes that are spaced apart from each other in the first direction and that extend in a second direction crossing the first direction. The electronic panel is folded inward or outward about the biaxial rotational axes, and the biaxial rotational axes are defined over or under the support plate depending on a folding direction of the electronic panel.

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240341153A1

    公开(公告)日:2024-10-10

    申请号:US18412691

    申请日:2024-01-15

    CPC classification number: H10K59/872 H10K59/873 H10K2102/311

    Abstract: A display panel including a base layer, a circuit layer disposed on the base layer and including a plurality of pixel pattern units arranged in a first direction and a second direction intersecting the first direction, a valley defined between the plurality of pixel pattern units, and a filler disposed in the valley, wherein each of the plurality of pixel pattern units includes at least one semiconductor layer and at least one conductive layer, and wherein a portion of a side surface of the valley is defined by at least one layer among the at least one semiconductor layer and the at least one conductive layer.

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