公开(公告)号：US20190148547A1

公开(公告)日：2019-05-16

申请号：US15997793

申请日：2018-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Young KIM ,  Deok Han BAE ,  Byung Chan RYU ,  Da Un JEON

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L29/7835 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76846 ,  H01L23/485 ,  H01L29/4975 ,  H01L29/78

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.

公开(公告)号：US20220085179A1

公开(公告)日：2022-03-17

申请号：US17325466

申请日：2021-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young KIM ,  Byung Chan RYU ,  Da Un JEON

IPC: H01L29/417 ,  H01L23/522 ,  H01L29/45 ,  H01L29/423 ,  H01L23/528

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain pattern on the substrate, the source/drain pattern being at a side of the gate structure, a source/drain contact filling on and connected to the source/drain pattern, an entire top surface of the source/drain contact filling being lower than a top surface of the gate structure, and a connection contact directly on and connected to the source/drain contact filling, a top surface of the connection contact being higher than the top surface of the gate structure.

公开(公告)号：US20190341492A1

公开(公告)日：2019-11-07

申请号：US16514067

申请日：2019-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young KIM ,  Deok Han BAE ,  Byung Chan RYU ,  Da Un JEON

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.

公开(公告)号：US20250063799A1

公开(公告)日：2025-02-20

申请号：US18619655

申请日：2024-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju Hun PARK ,  Jong Hyun PARK ,  Jong Lae LEE ,  Jong Sun LEE ,  Da Un JEON ,  Hyo Won JEONG ,  Gyu Eon CHO ,  Hyo Taek CHOI ,  Soo Yeon HONG

IPC: H01L29/417 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L29/78

Abstract: A semiconductor device includes: an active pattern extending in a first direction across an underlying substrate, a gate structure extending in a second direction, on the active pattern, a first source/drain contact electrically connected to a source/drain region within the active pattern, on one side of the gate structure, and a first via pattern electrically connected to an upper surface of the first source/drain contact. A rail pattern is provided, which extends in the first direction, and is spaced apart from the first via pattern in the second direction. A wiring pattern extends in the first direction, and is electrically connected to an upper surface of the rail pattern. The first source/drain contact includes a first recess therein, which is more recessed downwardly relative to the upper surface of the first source/drain contact, and at least a portion of the first recess extends adjacent to the rail pattern.

公开(公告)号：US20210126128A1

公开(公告)日：2021-04-29

申请号：US17137850

申请日：2020-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young KIM ,  Deok Han BAE ,  Byung Chan RYU ,  Da Un JEON

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.