公开(公告)号：US20220238534A1

公开(公告)日：2022-07-28

申请号：US17720945

申请日：2022-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyejin SEONG ,  Jisuk PARK ,  Sungho CHOI

IPC: H01L27/108

Abstract: A semiconductor memory device includes a substrate having a memory cell region, a peripheral region, and a dam region between the memory cell region and the peripheral region, the memory cell region having a rectangular shape according to a top view and having a plurality of active regions defined therein; a plurality of bit line structures extending on the substrate in the memory cell region to be parallel with each other in a first horizontal direction, each including a bit line; a plurality of buried contacts filling lower portions of spaces among the plurality of bit line structures on the substrate; a plurality of landing pads on the plurality of buried contacts; and a dam structure including a first dam structure and a second dam structure in the dam region and being at the same level as the plurality of landing pads.

公开(公告)号：US20220181330A1

公开(公告)日：2022-06-09

申请号：US17680913

申请日：2022-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyejin SEONG ,  Jisuk PARK ,  Sungho CHOI

IPC: H01L27/108

Abstract: A semiconductor memory device includes a substrate having a memory cell region, a peripheral region, and a dam region between the memory cell region and the peripheral region, the memory cell region having a rectangular shape according to a top view and having a plurality of active regions defined therein; a plurality of bit line structures extending on the substrate in the memory cell region to be parallel with each other in a first horizontal direction, each including a bit line; a plurality of buried contacts filling lower portions of spaces among the plurality of bit line structures on the substrate; a plurality of landing pads on the plurality of buried contacts; and a dam structure including a first dam structure and a second dam structure in the dam region and being at the same level as the plurality of landing pads.

公开(公告)号：US20210082924A1

公开(公告)日：2021-03-18

申请号：US16865574

申请日：2020-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyejin SEONG ,  Jisuk PARK ,  Sungho CHOI

IPC: H01L27/108

Abstract: A semiconductor memory device includes a substrate having a memory cell region, a peripheral region, and a dam region between the memory cell region and the peripheral region, the memory cell region having a rectangular shape according to a top view and having a plurality of active regions defined therein; a plurality of bit line structures extending on the substrate in the memory cell region to be parallel with each other in a first horizontal direction, each including a bit line; a plurality of buried contacts filling lower portions of spaces among the plurality of bit line structures on the substrate; a plurality of landing pads on the plurality of buried contacts; and a dam structure including a first dam structure and a second dam structure in the dam region and being at the same level as the plurality of landing pads.