公开(公告)号：US20240397708A1

公开(公告)日：2024-11-28

申请号：US18402790

申请日：2024-01-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juho Lee ,  Seongjae Byeon ,  Wonsok Lee ,  Jeon IL Lee

IPC: H10B12/00

Abstract: A semiconductor memory device includes a bit line on a substrate and extending in a first direction parallel to a top surface of the substrate, a channel pattern connected to a top surface of the bit line and extending in a second direction perpendicular to the top surface of the substrate, a first drain pattern on the channel pattern, a first word line adjacent to a lower portion of the first drain pattern and the channel pattern, and a gate insulating layer between the lower portion of the first drain pattern and the first word line and between the channel pattern and the first word line. An energy band gap of a first material of the first drain pattern is greater than an energy band gap of a second material of the channel pattern.