公开(公告)号：US20250098172A1

公开(公告)日：2025-03-20

申请号：US18773994

申请日：2024-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hak Seon KIM ,  Kang Oh YUN ,  Dong Jin LEE ,  Jae Duk LEE

IPC: H10B43/40 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H10B43/27 ,  H10B80/00

Abstract: A semiconductor memory device includes a peripheral circuit structure; and a cell structure including a cell substrate and a gate electrode, on the peripheral circuit structure. The peripheral circuit structure includes a peripheral circuit board including a first surface facing the cell structure and a second surface opposite to the first surface, a first circuit element on the first surface of the peripheral circuit board, a first wiring line electrically connected to the first circuit element in a first interlayer insulating layer, a capacitor dielectric layer covering the second surface of the peripheral circuit board, a first capacitor electrode in the capacitor dielectric layer, a second capacitor electrode spaced apart from the first capacitor electrode in the capacitor dielectric layer, and a first connection via electrically connecting the first capacitor electrode with the first wiring line by passing through the peripheral circuit board.