公开(公告)号：US11797711B2

公开(公告)日：2023-10-24

申请号：US17291809

申请日：2019-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeyoung Lee ,  Kyungmoon Kim ,  Yikeun Park ,  Kichan Sung ,  Dongjin Lee ,  Heesoo Lee

IPC: G06F21/62 ,  G06F21/57 ,  G06F21/60 ,  G06F21/64

CPC classification number: G06F21/6254 ,  G06F21/577 ,  G06F21/602 ,  G06F21/606 ,  G06F21/64

Abstract: The present document relates to an electronic device, a method for providing personal information using same, and a computer-readable recording medium for recording same, wherein the electronic device may include a communication circuit, a storage, a display, and a processor. According to various embodiments, the processor may be configured to generate a smart contract comprising information on categories of personal information to be provided to an external user, information about the external user, and information about a de-identification level of the personal information to be provided; transfer the smart contract to a block chain; receive a request for provision of personal information from the block chain; process personal information of a user on the basis of the smart contract; and transfer the processed personal information to the block chain. Other various embodiments are possible.

公开(公告)号：US11164636B2

公开(公告)日：2021-11-02

申请号：US16898533

申请日：2020-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunyeong Lee ,  Kyungmoon Kim ,  Woojae Jang ,  Chanjong Ju

IPC: G11C7/00 ,  G11C16/16 ,  H01L27/11582 ,  H01L27/1157 ,  G11C16/34 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/04

Abstract: A nonvolatile memory device includes a memory cell array, an erase body voltage generator, and an erase source voltage generator. The memory cell array includes memory blocks, each of which includes cell strings each including a ground selection transistor, memory cells, and a string selection transistor stacked in a direction perpendicular to a substrate. The erase body voltage generator applies an erase body voltage to the substrate during an erase operation. The erase source voltage generator applies an erase source voltage to a common source line connected with ground selection transistors of the cell strings during the erase operation.

公开(公告)号：US10699789B2

公开(公告)日：2020-06-30

申请号：US16177479

申请日：2018-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunyeong Lee ,  Kyungmoon Kim ,  Woojae Jang ,  Chanjong Ju

IPC: G11C7/00 ,  G11C16/16 ,  H01L27/11582 ,  H01L27/1157 ,  G11C16/34 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/04

Abstract: A nonvolatile memory device includes a memory cell array, an erase body voltage generator, and an erase source voltage generator. The memory cell array includes memory blocks, each of which includes cell strings each including a ground selection transistor, memory cells, and a string selection transistor stacked in a direction perpendicular to a substrate. The erase body voltage generator applies an erase body voltage to the substrate during an erase operation. The erase source voltage generator applies an erase source voltage to a common source line connected with ground selection transistors of the cell strings during the erase operation.