公开(公告)号：US20190027474A1

公开(公告)日：2019-01-24

申请号：US16141923

申请日：2018-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-chul OH ,  SEJIN PARK

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The method comprises forming active patterns on a substrate that includes first and second logic cell regions adjacent to each other in a first direction, and forming on the substrate a device isolation layer exposing upper portions of the active patterns. The forming the active patterns comprises forming first line mask patterns extending parallel to each other in the first direction and running across the first and second logic cell regions, forming on the first line mask patterns an upper separation mask pattern including a first opening overlapping at least two of the first line mask patterns, forming first hardmask patterns from the at least two first line mask patterns, and etching the substrate to form trenches defining the active patterns.

公开(公告)号：US20170338229A1

公开(公告)日：2017-11-23

申请号：US15478234

申请日：2017-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-chul OH ,  SEJIN PARK

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/092 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66674 ,  H01L29/66795 ,  H01L29/7801 ,  H01L29/785

Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The method comprises forming active patterns on a substrate that includes first and second logic cell regions adjacent to each other in a first direction, and forming on the substrate a device isolation layer exposing upper portions of the active patterns. The forming the active patterns comprises forming first line mask patterns extending parallel to each other in the first direction and running across the first and second logic cell regions, forming on the first line mask patterns an upper separation mask pattern including a first opening overlapping at least two of the first line mask patterns, forming first hardmask patterns from the at least two first line mask patterns, and etching the substrate to form trenches defining the active patterns.

公开(公告)号：US20250149314A1

公开(公告)日：2025-05-08

申请号：US18931884

申请日：2024-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mukyeong KIM ,  Hyun Seok KIM ,  SEJIN PARK ,  HONG JAE KANG ,  DAE-HOON LEE ,  JEONGAN CHOI ,  KWAN-TAE KIM ,  YOU-NA KIM ,  HOHYUN SONG ,  HEESOO LEE ,  YOUNGHOON SONG ,  Iljeong HEO

IPC: H01J37/32

Abstract: A scrubber may include a plasma processing unit including a plasma generating device and a power generating device, a combustion processing unit including a combustor, which is used to form a flame, a connection conduit connected to the plasma processing unit and spaced apart from the combustion processing unit, and a back-end processing unit connected to the combustion processing unit. The connection conduit may be used to supply a waste gas to the plasma generating device, and the plasma generating device may be configured to form plasma using the waste gas. The plasma and combustion processing units may be configured to provide a first reaction space, in which the plasma is formed, and a second reaction space, in which the flame is formed.

公开(公告)号：US20210257371A1

公开(公告)日：2021-08-19

申请号：US17077257

申请日：2020-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOONHO SON ,  SUKLAE KIM ,  SEJIN PARK ,  SEUNGJOONG SHIN ,  HYUEWON LEE

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor device includes a memory cell storing data. The memory cell capacitor includes a plurality of bottom electrodes on a substrate and extending in a vertical direction with respect to a top surface of the substrate, the plurality of bottom electrodes being spaced apart from each other in a first direction parallel to the top surface of the substrate, an upper support pattern on upper lateral surfaces of the plurality of bottom electrodes, and a lower support pattern on lower lateral surfaces of the plurality of bottom electrodes. The lower support pattern is disposed between the substrate and the upper support pattern, and a first bottom electrode of the plurality of bottom electrodes includes a first recess adjacent to a bottom surface of the lower support pattern.