公开(公告)号：US09678864B2

公开(公告)日：2017-06-13

申请号：US14559327

申请日：2014-12-03

Applicant: Seagate Technology LLC

Inventor： Jun Cai ,  AndiSumaryo Sutiawan ,  Jeetandra Kella ,  ChuanPeng Ong ,  Mark Allen Gaertner ,  Brian T. Edgar

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F11/10

CPC classification number: G06F12/0246 ,  G06F11/1016 ,  G06F11/1072 ,  G06F2206/1014 ,  G06F2212/7201

Abstract: A device includes one or more data storage media having a main storage area, and includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area. Each of the data packets is associated with a different logical block address (LBA), and each of the physical locations is associated with a different physical location address (PLA). The controller generates mapping information that links the different LBAs to the different PLAs. Upon detecting a soft error when reading a data packet stored in a physical location, the controller relocates the data packet associated with the soft error to a physical location of the non-volatile cache memory. The controller also marks the physical location as a suspect location. The controller updates the mapping information to reflect the relocation of the data packet associated with the soft error.

公开(公告)号：US20160162208A1

公开(公告)日：2016-06-09

申请号：US14559327

申请日：2014-12-03

Applicant: Seagate Technology LLC

Inventor： Jun Cai ,  AndiSumaryo Sutiawan ,  Jeetandra Kella ,  ChuanPeng Ong ,  Mark Allen Gaertner ,  Brian T. Edgar

IPC: G06F3/06 ,  G06F12/02 ,  G06F11/10

CPC classification number: G06F12/0246 ,  G06F11/1016 ,  G06F11/1072 ,  G06F2206/1014 ,  G06F2212/7201

Abstract: A device includes one or more data storage media having a main storage area. The device also includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area of the one or more data storage media. Each of the plurality of data packets is associated with a different logical block address (LBA), and each of the plurality of physical locations is associated with a different physical location address. The controller generates mapping information that links the different LBAs associated with the different data packets to the different physical location addresses associated with the different physical locations. Upon detecting a soft error when reading at least one data packet of the plurality of data packets stored in at least one physical location of the plurality of physical locations, the controller relocates the at least one data packet associated with the soft error to at least one physical location of a non-volatile cache memory. The controller also makes an indication that the at least one physical location of the plurality of physical locations is a suspect location. The controller updates the mapping information to reflect the relocation of the at least one data packet associated with the soft error to the at least one physical location in the non-volatile cache memory.

Abstract translation: 一种设备包括具有主存储区域的一个或多个数据存储介质。 该设备还包括非易失性高速缓冲存储器和控制器。 控制器将多个数据分组存储到一个或多个数据存储介质的主存储区域中的多个物理位置。 多个数据分组中的每一个与不同的逻辑块地址（LBA）相关联，并且多个物理位置中的每一个与不同的物理位置地址相关联。 控制器生成将与不同数据分组相关联的不同的LBA链接到与不同物理位置相关联的不同物理位置地址的映射信息。 当读取存储在多个物理位置中的至少一个物理位置中的多个数据分组中的至少一个数据分组时检测到软错误，控制器将与软错误相关联的至少一个数据分组重新定位到至少一个 非易失性缓存的物理位置。 控制器还指示多个物理位置中的至少一个物理位置是可疑位置。 控制器更新映射信息以反映与软错误相关联的至少一个数据分组的重定位到非易失性高速缓冲存储器中的至少一个物理位置。