公开(公告)号：US08724254B1

公开(公告)日：2014-05-13

申请号：US13104835

申请日：2011-05-10

申请人： Shan Tang ,  Jianjun Li ,  Jianguo Zhou ,  Wei Xi

发明人： Shan Tang ,  Jianjun Li ,  Jianguo Zhou ,  Wei Xi

IPC分类号： G11B5/596 ,  G11B5/54

CPC分类号： G11B5/5552 ,  G11B5/596

摘要： A method of evaluating a dual stage actuator (DSA) servo loop in a disk drive is disclosed. The disk drive comprises a dual stage actuator (DSA) servo loop operable to actuate a head over a disk surface. A first sinusoidal signal A1 is added to a VCM control signal B1 generated by a VCM servo loop. A response of the VCM control signal B1 to the first sinusoidal signal A1 is measured, and a closed loop response of the VCM servo loop is computed in response to A1 and B1. A second sinusoidal signal A2 is added to a microactuator control signal B2 generated by a microactuator servo loop. A response of the microactuator control signal B2 to the second sinusoidal signal A2 is measured, and a closed loop response of the microactuator servo loop is computed in response to A2 and B2.

摘要翻译： 公开了一种评估磁盘驱动器中的双级致动器（DSA）伺服环路的方法。 磁盘驱动器包括可操作以在磁盘表面上致动磁头的双级致动器（DSA）伺服回路。 将第一正弦信号A1加到由VCM伺服回路产生的VCM控制信号B1中。 测量VCM控制信号B1对第一正弦信号A1的响应，并根据A1和B1计算VCM伺服回路的闭环响应。 第二正弦信号A2被添加到由微致动器伺服回路产生的微致动器控制信号B2。 测量微致动器控制信号B2对第二正弦信号A2的响应，并响应于A2和B2计算微致动器伺服回路的闭环响应。

公开(公告)号：US08254222B1

公开(公告)日：2012-08-28

申请号：US13052353

申请日：2011-03-21

申请人： Shan Tang

发明人： Shan Tang

IPC分类号： G11B7/00 ,  G11B5/596

CPC分类号： G11B5/556

摘要： A disk drive is disclosed comprising a disk surface, a head coupled to a distal end of an actuator arm, and a dual stage actuator (DSA) servo loop comprising a voice coil motor (VCM) servo loop and a microactuator servo loop operable to actuate the head over the disk surface. The microactuator servo loop is disabled, and after disabling the microactuator servo loop a sinusoid is injected into the VCM servo loop, wherein the sinusoid comprises a target frequency. A first open loop response of the VCM servo loop is computed. The microactuator servo loop is enabled, and after enabling the microactuator servo loop the sinusoid is injected into the DSA servo loop. A second open loop response of the DSA servo loop is computed. A microactuator servo loop gain and a VCM servo loop gain are tuned in response to the first and second open loop responses.

摘要翻译： 公开了一种磁盘驱动器，其包括磁盘表面，联接到致动器臂的远端的磁头以及包括音圈电动机（VCM）伺服环路和可操作以致动的微致动器伺服环路的双级致动器（DSA）伺服环路 头顶在磁盘表面。 微致动器伺服回路被禁止，在禁用微致动器伺服回路之后，将正弦波注入到VCM伺服回路中，其中正弦波包括目标频率。 计算VCM伺服环路的第一个开环响应。 启动微动作器伺服回路，启动微致动器伺服回路后，将正弦曲线注入到DSA伺服回路中。 计算DSA伺服环路的第二个开环响应。 响应于第一和第二开环响应来调节微致动器伺服环路增益和VCM伺服环路增益。

公开(公告)号：US08709892B2

公开(公告)日：2014-04-29

申请号：US11915039

申请日：2006-05-22

申请人： Chuanbin Mao ,  Shan Tang ,  Sanjay Banerjee

发明人： Chuanbin Mao ,  Shan Tang ,  Sanjay Banerjee

IPC分类号： H01L21/336

CPC分类号： B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L51/0093

摘要： A method for fabricating a flash memory device where the flash memory device includes a substantially uniform size and spatial distribution of nanoparticles on a tunnel oxide layer to form a floating gate. The flash memory device may be fabricated by defining active areas in a substrate and forming an oxide layer on the substrate. A self-assembled protein lattice may be formed on top of the oxide layer where the self-assembled protein lattice includes a plurality of molecular chaperones. The cavities of the chaperones may provide confined spaces where nanocrystals can be trapped thereby forming an ordered nanocrystal lattice. A substantially uniform distribution of nanocrystals may be formed on the oxide layer upon removal of the self-assembled protein lattice such as through high temperature annealing.

摘要翻译： 一种用于制造闪速存储器件的方法，其中闪存器件包括在隧道氧化物层上的纳米颗粒的基本均匀的尺寸和空间分布以形成浮动栅极。 闪存器件可以通过在衬底中限定有源区域并在衬底上形成氧化物层来制造。 自组装蛋白质晶格可以形成在氧化物层的顶部，其中自组装蛋白质晶格包括多个分子伴侣。 分子伴侣的空腔可以提供限制的空间，其中可以捕获纳米晶体，从而形成有序的纳米晶格。 在去除自组装蛋白质晶格例如通过高温退火之后，可以在氧化物层上形成基本均匀的纳米晶体分布。

公开(公告)号：US20080191265A1

公开(公告)日：2008-08-14

申请号：US11915039

申请日：2006-05-22

申请人： Chuanbin Mao ,  Shan Tang ,  Sanjay Banerjee

发明人： Chuanbin Mao ,  Shan Tang ,  Sanjay Banerjee

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L51/0093

摘要： A method for fabricating a flash memory device where the flash memory device includes a substantially uniform size and spatial distribution of nanoparticles on a tunnel oxide layer to form a floating gate. The flash memory device may be fabricated by defining active areas in a substrate and forming an oxide layer on the substrate. A self-assembled protein lattice may be formed on top of the oxide layer where the self-assembled protein lattice includes a plurality of molecular chaperones. The cavities of the chaperones may provide confined spaces where nanocrystals can be trapped thereby forming an ordered nanocrystal lattice. A substantially uniform distribution of nanocrystals may be formed on the oxide layer upon removal of the self-assembled protein lattice such as through high temperature annealing.

摘要翻译： 一种用于制造闪速存储器件的方法，其中闪存器件包括在隧道氧化物层上的纳米颗粒的基本均匀的尺寸和空间分布以形成浮动栅极。 闪存器件可以通过在衬底中限定有源区域并在衬底上形成氧化物层来制造。 自组装蛋白质晶格可以形成在氧化物层的顶部，其中自组装蛋白质晶格包括多个分子伴侣。 分子伴侣的空腔可以提供限制的空间，其中可以捕获纳米晶体，从而形成有序的纳米晶格。 在去除自组装蛋白质晶格例如通过高温退火之后，可以在氧化物层上形成基本均匀的纳米晶体分布。