Systems and methods using multiple inter-chip (IC) links for antenna diversity and/or debug
    1.
    发明授权
    Systems and methods using multiple inter-chip (IC) links for antenna diversity and/or debug 有权
    使用多个芯片间(IC)链路进行天线分集和/或调试的系统和方法

    公开(公告)号:US09178592B1

    公开(公告)日:2015-11-03

    申请号:US14340004

    申请日:2014-07-24

    CPC classification number: H04B7/08 H04B1/0007 H04B1/40 H04B7/06

    Abstract: Systems and methods are disclosed that implement multiple inter-chip (IC) links to communicate digital signals and data between multiple tuner circuit chips of a radio frequency (RF) antenna diversity system. The multiple IC communication links may be employed, for example, to simultaneously communicate different signals and/or data between individual tuner circuit chips of a multi-signal type antenna diversity system in an asynchronous manner, and may be employed to achieve simultaneous antenna diversity for multiple RF signal types using a scalable IC communication link architecture that includes multiple IC communication links to interconnect a varying number of RF tuner circuit chips.

    Abstract translation: 公开了实现多个芯片间(IC)链路以在射频(RF)天线分集系统的多个调谐器电路芯片之间传送数字信号和数据的系统和方法。 可以采用多个IC通信链路,例如,以异步方式同时在多信号型天线分集系统的各个调谐器电路芯片之间传送不同的信号和/或数据,并且可以用于实现同时的天线分集 使用包括多个IC通信链路以便互连多个RF调谐器电路芯片的可扩展IC通信链路架构的多个RF信号类型。

    Integrated circuit with inter-chip link for boot-up
    2.
    发明授权
    Integrated circuit with inter-chip link for boot-up 有权
    具有芯片间链路的集成电路,用于启动

    公开(公告)号:US09118374B2

    公开(公告)日:2015-08-25

    申请号:US14083074

    申请日:2013-11-18

    CPC classification number: H04B7/08 H04B7/0837

    Abstract: An integrated circuit includes a first port for conducting a first plurality of signals, a second port for conducting a second plurality of signals, a data path coupled between the first port and the second port, a controller, and a processor having an input and an output. In a first mode, the controller causes the data path to conduct at least one signal received on the first port to the second port. In a second mode, the controller controls the processor to output signals to the second port.

    Abstract translation: 集成电路包括用于进行第一多个信号的第一端口,用于进行第二多个信号的第二端口,耦合在第一端口和第二端口之间的数据路径,控制器和具有输入和 输出。 在第一模式中,控制器使得数据路径将在第一端口上接收的至少一个信号传送到第二端口。 在第二模式中,控制器控制处理器将信号输出到第二端口。

    INTEGRATED CIRCUIT WITH INTER-CHIP LINK FOR BOOT-UP
    3.
    发明申请
    INTEGRATED CIRCUIT WITH INTER-CHIP LINK FOR BOOT-UP 有权
    集成电路具有用于启动的互连链路

    公开(公告)号:US20150139370A1

    公开(公告)日:2015-05-21

    申请号:US14083074

    申请日:2013-11-18

    CPC classification number: H04B7/08 H04B7/0837

    Abstract: An integrated circuit includes a first port for conducting a first plurality of signals, a second port for conducting a second plurality of signals, a data path coupled between the first port and the second port, a controller, and a processor having an input and an output. In a first mode, the controller causes the data path to conduct at least one signal received on the first port to the second port. In a second mode, the controller controls the processor to output signals to the second port.

    Abstract translation: 集成电路包括用于进行第一多个信号的第一端口,用于进行第二多个信号的第二端口,耦合在第一端口和第二端口之间的数据路径,控制器和具有输入和 输出。 在第一模式中,控制器使得数据路径将在第一端口上接收的至少一个信号传送到第二端口。 在第二模式中,控制器控制处理器将信号输出到第二端口。

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