公开(公告)号：US11182286B2

公开(公告)日：2021-11-23

申请号：US16585583

申请日：2019-09-27

Applicant: Silicon Motion, Inc.

Inventor： Jian-Yu Chen ,  Bo-Yan Jhan ,  Yuh-Jang Lo ,  Shih-Chang Chang

IPC: G06F12/02

Abstract: A high-performance data storage device is disclosed. A non-volatile memory stores a logical-to-physical address mapping table that maps logical addresses recognized by a host to a physical space in the non-volatile memory. The logical-to-physical address mapping table is divided into a plurality of sub mapping tables. A memory controller utilizes temporary storage when controlling the non-volatile memory. The memory controller plans a sub mapping table area in the temporary storage to store sub mapping tables corresponding to a plurality of nodes which are linked and managed by multiple linked lists.

公开(公告)号：US11080203B2

公开(公告)日：2021-08-03

申请号：US16573409

申请日：2019-09-17

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Shih-Chang Chang

IPC: G06F12/1009 ,  G06F12/0802 ,  G06F12/02

Abstract: High performance data storage device is disclosed, which has a memory controller dynamically updating mapping information on the temporary storage to manage physical space information mapped to a logical address recognized by a host. The memory controller uses a first bit to an Nth bit of the physical space information to indicate a physical space of the non-volatile memory or a cache address of the data cache space, without using additional bits to map the physical space information to the non-volatile memory or the data cache space, where N is a number greater than one. Among numbers formed by the first to the Nth bit, the memory controller uses numbers corresponding to non-existent physical space of the non-volatile memory to map the physical space information to the non-volatile memory or the data cache space.