公开(公告)号：US20050246566A1

公开(公告)日：2005-11-03

申请号：US10837079

申请日：2004-04-30

申请人： Stefan Boult

发明人： Stefan Boult

IPC分类号： A01K67/027 ,  A61K38/00 ,  A61K48/00 ,  C07K14/755 ,  C12N15/85 ,  C12N15/861 ,  G06F1/04 ,  G06F1/14

CPC分类号： G06F1/04 ,  A61K38/00 ,  A61K48/00 ,  G06F1/14

摘要： A simple and accurate processor derating method includes: sampling a real-time counter/clock too obtain an initial time value T1; resetting an Icnt Counter; incrementing the Icnt Counter to reflect the processing of each instruction; comparing the count in the Icnt Counter to a predetermined count IcntMax and if the count in the Icnt Counter is at least IcntMax, then sampling the RTC to obtain a second time T2. T1 is then subtracted from T2 to obtain a time difference DT which is multiplied by ((1−1/DF)−1) to obtain a Degradation Delay DD period, DF being a constant having a value which is the desired submodel performance with respect to full performance. The Degradation Delay is instituted, the RTC is sampled from time to time to obtain a test third time T3. When a test T3 minus T2 is not less than DD, then T1 is set to T3. Then, the procedure is repeated for a next group of instructions. Optionally, further accuracy can be achieved by treating “wait-type” and/or “RTC-access-type” instructions specially and also by calculating a DDExtra period value which is used to adjust the next DD.

摘要翻译： 一种简单准确的处理器降额方法包括：对实时计数器/时钟进行采样也获得初始时间值T 1; 复位一个Icnt计数器; 增加Icnt计数器以反映每个指令的处理; 将Icnt计数器中的计数与预定计数IcntMax进行比较，并且如果Icnt计数器中的计数至少为IcntMax，则对RTC进行采样以获得第二时间T 2。 然后从T 2中减去T 1以获得乘以（（1-1 / DF）-1）的时差DT，以获得降级延迟DD周期，DF是具有作为期望子模型性能的值的常数 关于完整的表现。 降级延迟建立，RTC不时采样，以获得第三次T 3的测试。 当测试T 3减去T 2不小于DD时，则T 1被设置为T 3。 然后，针对下一组指令重复该过程。 可选地，可以通过特别地处理“等待类型”和/或“RTC访问型”指令并且还可以通过计算用于调整下一个DD的DDExtra周期值来实现进一步的准确性。

公开(公告)号：US20060048162A1

公开(公告)日：2006-03-02

申请号：US10928542

申请日：2004-08-26

申请人： Stefan Boult

发明人： Stefan Boult

IPC分类号： G06F9/46

CPC分类号： G06F9/526 ,  G06F9/3004 ,  G06F9/30072

摘要： A reliable and performant mechanism for communicating between independent processes, threads or parts of a computer system is described in which conditional atomic counters are used to manage a message queue. The conditional atomic counters control access to a message queue or memory space in a simple and reliable manner while minimizing the overhead of access to the mutex gate objects typically used in the implementation of message queues of the prior art. When implemented in software, a producer count and consumer count are maintained using conditional atomic store instructions with the condition on the store ensuring that one and only one producer or consumer of message records can actually post or receive validation of any specific message record. A counterpart implementation in hardware utilizes hardware mechanisms equivalent to those invoked by the software program.

摘要翻译： 描述了用于在独立进程，线程或计算机系统的部分之间进行通信的可靠和执行的机制，其中使用条件原子计数器来管理消息队列。 条件原子计数器以简单和可靠的方式控制对消息队列或存储器空间的访问，同时最小化对通常用于实现现有技术的消息队列的互斥体门对象的访问的开销。 当以软件实现时，使用具有商店条件的条件原子存储指令来维护生产者计数和消费者计数，确保消息记录的唯一一个生产者或消费者可以实际发布或接收任何特定消息记录的验证。 硬件中的对应实现利用与软件程序调用的硬件机制相当的硬件机制。