公开(公告)号：US09077992B2

公开(公告)日：2015-07-07

申请号：US13103578

申请日：2011-05-09

申请人： Sung-bum Park ,  Jae-won Yoon ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi ,  Huai-rong Shao

发明人： Sung-bum Park ,  Jae-won Yoon ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi ,  Huai-rong Shao

IPC分类号： H04N19/182 ,  H04N19/105 ,  H04N19/176 ,  H04N19/593 ,  H04N19/124 ,  H04N19/91

摘要： A method and apparatus for processing a video frame is provided. The method includes dividing the video frame into pixel blocks each including a reference pixel; calculating difference values between the reference pixel and pixels neighboring the reference pixel; converting the calculated difference values into values that belong to a bit depth range; and performing entropy coding by using the converted difference values as symbols.

公开(公告)号：US09143791B2

公开(公告)日：2015-09-22

申请号：US13103578

申请日：2011-05-09

申请人： Sung-bum Park ,  Jae-won Yoon ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi ,  Huai-rong Shao

发明人： Sung-bum Park ,  Jae-won Yoon ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi ,  Huai-rong Shao

IPC分类号： H04N19/182 ,  H04N19/105 ,  H04N19/176 ,  H04N19/593 ,  H04N19/124 ,  H04N19/91

CPC分类号： H04N19/182 ,  H04N19/105 ,  H04N19/124 ,  H04N19/176 ,  H04N19/184 ,  H04N19/593 ,  H04N19/91

摘要： A method and apparatus for processing a video frame is provided. The method includes dividing the video frame into pixel blocks each including a reference pixel; calculating difference values between the reference pixel and pixels neighboring the reference pixel; converting the calculated difference values into values that belong to a bit depth range; and performing entropy coding by using the converted difference values as symbols.

摘要翻译： 提供了一种用于处理视频帧的方法和装置。 该方法包括将视频帧划分为每个包括参考像素的像素块; 计算参考像素和与参考像素相邻的像素之间的差值; 将计算的差值转换为属于比特深度范围的值; 以及通过使用转换的差值作为符号来执行熵编码。

公开(公告)号：US09071849B2

公开(公告)日：2015-06-30

申请号：US13082929

申请日：2011-04-08

申请人： Jae-won Yoon ,  Sung-bum Park ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi

发明人： Jae-won Yoon ,  Sung-bum Park ,  Hae-young Jun ,  Shin-wook Kang ,  Dai-woong Choi

IPC分类号： H04N19/00 ,  H04N19/593

CPC分类号： H04N19/593

摘要： A method and apparatus for generating video packets and a method and apparatus for restoring video are provided. The method of generating video packets includes: generating at least one pixel block consisting of at least one reference pixel and a plurality of neighboring pixels adjacent to the at least one reference pixel from pixels of a video frame; replacing pixel values of the neighboring pixels in the at least one pixel block with pixel difference values, which are difference values between a pixel value of one of pixels adjacent to the neighboring pixels and the pixel values of the neighboring pixels; generating packets so that a pixel value of the at least one reference pixel and the pixel difference values of the neighboring pixels are allocated to different packets according to positions of the pixels; and performing entropy coding of some of the packets including the pixel difference values of the neighboring pixels.

摘要翻译： 提供了一种用于产生视频分组的方法和装置以及用于恢复视频的方法和装置。 产生视频分组的方法包括：从视频帧的像素生成由与至少一个参考像素相邻的至少一个参考像素和多个相邻像素组成的至少一个像素块; 用像素差值代替所述至少一个像素块中的相邻像素的像素值，所述像素差值是与相邻像素相邻的一个像素的像素值与相邻像素的像素值之间的差值; 生成分组，使得根据像素的位置将所述至少一个参考像素的像素值和相邻像素的像素差值分配给不同的分组; 并执行包括相邻像素的像素差值的一些分组的熵编码。

公开(公告)号：US07873777B2

公开(公告)日：2011-01-18

申请号：US11698133

申请日：2007-01-26

申请人： Shin-wook Kang

发明人： Shin-wook Kang

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G06F2212/7203

摘要： Provided are a multi-channel flash memory system capable of increasing the overall bandwidth by using a plurality of flash memory chips, and a programming method performed in the flash memory system. The flash memory system includes: a plurality of channel units each including at least two flash memory chips, a control unit which controls the flash memory chips, and a buffer unit which stores external data; and a host interface unit which transmits data separated according to the number of the channel units and transmitted by a host to the buffer units of the channel units, wherein the control unit records the data stored in the buffer unit into the at least two flash memory chips.

摘要翻译： 提供了能够通过使用多个闪速存储器芯片来增加总体带宽的多通道快闪存储器系统，以及在闪速存储器系统中执行的编程方法。 闪存系统包括：多个通道单元，每个通道单元包括至少两个闪存芯片，控制闪存芯片的控制单元和存储外部数据的缓冲器单元; 以及主机接口单元，其发送根据所述信道单元的数量分离并由主机发送到所述信道单元的缓冲器单元的数据，其中所述控制单元将存储在所述缓冲器单元中的数据记录到所述至少两个闪存中 筹码

公开(公告)号：US20080301381A1

公开(公告)日：2008-12-04

申请号：US12099287

申请日：2008-04-08

申请人： Dong-woo LEE ,  Houng-sog Min ,  Shin-wook Kang ,  Hyang-suk Park ,  Seong-hun Jeong ,  Sang-seob Shin ,  Hye-lime Jeong

发明人： Dong-woo LEE ,  Houng-sog Min ,  Shin-wook Kang ,  Hyang-suk Park ,  Seong-hun Jeong ,  Sang-seob Shin ,  Hye-lime Jeong

IPC分类号： G06F12/00

CPC分类号： G06F13/28 ,  G06F3/0601 ,  G06F2003/0692

摘要： A method and device for controlling commands used for a flash memory are provided. The method includes, substantially reducing usage of a central processing unit (CPU) and a bus, when controlling the flash memory, by receiving information on at least one command currently stored in a system memory, receiving a command represented by the received information from the system memory, and generating an interrupt representing that all the commands are received, when receiving of substantially all the commands represented by the received information is completed.

摘要翻译： 提供了一种用于控制用于闪速存储器的命令的方法和装置。 该方法包括：通过接收当前存储在系统存储器中的至少一个命令的信息来控制闪速存储器时，大大减少中央处理单元（CPU）和总线的使用，接收来自 并且当接收到基本上所有由所接收的信息表示的命令完成时，产生表示接收到所有命令的中断。

公开(公告)号：US07765359B2

公开(公告)日：2010-07-27

申请号：US11730800

申请日：2007-04-04

申请人： Shin-wook Kang ,  Dong-woo Lee

发明人： Shin-wook Kang ,  Dong-woo Lee

IPC分类号： G06F12/00

CPC分类号： G11C16/10

摘要： Provided are a flash memory system and a programming method performed in the flash memory system. The flash memory system includes a buffer unit including a plurality of buffers, and temporarily storing data transmitted by a host; a plurality of channel units each including at least one flash memory chip that includes a plurality of memory cell arrays; and a control unit which controls the data stored in the buffer unit to be sequentially transmitted to the channel units and the transmitted data to be recorded to the memory cell arrays of the flash memory chips in the channel units.

摘要翻译： 提供了一种在闪存系统中执行的闪存系统和编程方法。 闪速存储器系统包括：缓冲单元，包括多个缓冲器，并临时存储主机发送的数据; 多个通道单元，每个通道单元包括至少一个包括多个存储单元阵列的闪存芯片; 以及控制单元，其将存储在缓冲器单元中的数据顺序地发送到频道单元，并将发送的数据记录到频道单元中的闪存芯片的存储单元阵列。

公开(公告)号：US20060200606A1

公开(公告)日：2006-09-07

申请号：US11304614

申请日：2005-12-16

申请人： Shin-wook Kang ,  Sung-kyu Choi

发明人： Shin-wook Kang ,  Sung-kyu Choi

IPC分类号： G06F13/00

CPC分类号： G06F13/4031 ,  G06F13/28

摘要： A system-on-chip (SOC) based on an advanced micro-controller bus architecture (AMBA), and particularly, a bus connection method, is provided. The bus connection method includes: allowing one of a plurality of masters to use a plurality of slaves; generating information necessary for using the slaves by decoding a command generated by the master allowed to use the slaves; and outputting signals with reference to the generated information according to a protocol of a bus system to which the slaves are connected. Accordingly, it is possible to transmit data in a pipeline approach by applying bank interleaving to an occasion when only one master issues a request for the reading or writing of data in units of blocks.

摘要翻译： 提供了基于先进的微控制器总线架构（AMBA）的片上系统（SOC），特别是总线连接方法。 总线连接方法包括：允许多个主机中的一个使用多个从机; 通过解码由允许使用从属设备的主机产生的命令来产生使用从机所需的信息; 并根据所述从站所连接的总线系统的协议，参照所生成的信息输出信号。 因此，可以通过应用存储体交织来传送数据，只有当一个主器件以块为单位发出对数据的读取或写入的请求时才发送数据。

公开(公告)号：US07044385B2

公开(公告)日：2006-05-16

申请号：US10600431

申请日：2003-06-23

申请人： Shin-wook Kang

发明人： Shin-wook Kang

IPC分类号： G06K19/00

CPC分类号： G06K7/10297 ,  G06K7/0008

摘要： An apparatus and method for identifying whether a memory card is inserted and for constituting data for identifying the memory card using hardware are provided. The apparatus establishes a data transfer mode through identifying the insertion of a card and includes a card insertion identifier, a card assignment information receiver, and a data transfer mode establisher. The card insertion identifier identifies whether a card is inserted. The card assignment information receiver receives predetermined card assignment information from a card driver if the card insertion identifier identifies that the card is inserted. The data transfer mode establisher establishes the data transfer mode for the card based on the card assignment information. The apparatus further includes a data transfer mode releaser that if the card insertion identifier identifies in the data transfer mode that the card is no longer inserted, informs the card driver that the card is not inserted to release the data transfer mode.

摘要翻译： 提供了用于识别存储卡是否被插入并且用于构成用于使用硬件识别存储卡的数据的装置和方法。 该装置通过识别卡的插入来建立数据传送模式，并且包括卡插入标识符，卡分配信息接收器和数据传输模式建立者。 卡插入标识符识别卡是否被插入。 卡片分配信息接收器如果卡片插入标识符识别卡被插入，则从卡片驱动器接收预定的卡片分配信息。 数据传输模式建立者基于卡分配信息建立卡的数据传输模式。 该装置还包括数据传输模式释放器，如果卡插入标识符在数据传送模式中识别出卡不再插入，则通知卡驱动器卡未插入以释放数据传输模式。

公开(公告)号：US07589999B2

公开(公告)日：2009-09-15

申请号：US11713638

申请日：2007-03-05

申请人： Seong-hun Jeong ,  Houng-sog Min ,  Dong-woo Lee ,  Shin-wook Kang ,  Hyang-suk Park

发明人： Seong-hun Jeong ,  Houng-sog Min ,  Dong-woo Lee ,  Shin-wook Kang ,  Hyang-suk Park

IPC分类号： G11C11/34

CPC分类号： G11C16/102 ,  G11C2216/14

摘要： A method and apparatus are provided for programming a non-volatile data storage device, in which a fast write operation can be performed using a plurality of page buffers included in the non-volatile data storage device when the write operation is performed in a way of using interleaving for each channel in a multi-channel system using a plurality of non-volatile data storage devices. The method includes programming data in a memory cell array included in the non-volatile data storage device using a page buffer selected from among a plurality of page buffers included in the non-volatile data storage device and performing a setup operation for loading data using another page buffer, which is different from the page buffer selected during the programming.

摘要翻译： 提供了一种用于对非易失性数据存储装置进行编程的方法和装置，其中当以非法数据存储装置的方式执行写入操作时，可以使用包括在非易失性数据存储装置中的多个页缓冲器执行快速写入操作 使用多个非易失性数据存储设备在多信道系统中对每个信道进行交织。 该方法包括使用从非易失性数据存储装置中包括的多个页缓冲器中选择的页缓冲器来编程包括在非易失性数据存储装置中的存储单元阵列中的数据，并执行用于使用另一个装载数据加载数据的设置操作 页面缓冲区，与编程期间选择的页面缓冲区不同。

公开(公告)号：US20070288688A1

公开(公告)日：2007-12-13

申请号：US11698133

申请日：2007-01-26

申请人： Shin-wook Kang

发明人： Shin-wook Kang

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G06F2212/7203

摘要： Provided are a multi-channel flash memory system capable of increasing the overall bandwidth by using a plurality of flash memory chips, and a programming method performed in the flash memory system. The flash memory system includes: a plurality of channel units each including at least two flash memory chips, a control unit which controls the flash memory chips, and a buffer unit which stores external data; and a host interface unit which transmits data separated according to the number of the channel units and transmitted by a host to the buffer units of the channel units, wherein the control unit records the data stored in the buffer unit into the at least two flash memory chips.

摘要翻译： 提供了能够通过使用多个闪速存储器芯片来增加总体带宽的多通道快闪存储器系统，以及在闪速存储器系统中执行的编程方法。 闪存系统包括：多个通道单元，每个通道单元包括至少两个闪存芯片，控制闪存芯片的控制单元和存储外部数据的缓冲器单元; 以及主机接口单元，其发送根据所述信道单元的数量分离并由主机发送到所述信道单元的缓冲器单元的数据，其中所述控制单元将存储在所述缓冲器单元中的数据记录到所述至少两个闪存中 筹码