公开(公告)号：US20180284824A1

公开(公告)日：2018-10-04

申请号：US15655373

申请日：2017-07-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sujan Kundapur MANOHAR ,  Angelo William PEREIRA ,  Ashish KHANDELWAL

IPC: G05F1/575 ,  G05F3/26 ,  G05F1/46 ,  G05F1/567

CPC classification number: G05F1/575 ,  G05F1/465 ,  G05F1/567 ,  G05F3/267

Abstract: A voltage regulator (e.g., a low drop-out regulator) includes a pass transistor coupled to an input voltage node and an output voltage node. The voltage regulator also includes a drive transistor coupled to a control input of the pass transistor and a first resistor coupled between a source and a back gate of the drive transistor. The voltage regulator also includes a complementary to absolute temperature (CTAT) current generator circuit coupled to the resistor and configured to generate a CTAT current to bias the first resistor.

公开(公告)号：US20210091562A1

公开(公告)日：2021-03-25

申请号：US16843324

申请日：2020-04-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kae Ann WONG ,  Siang Tong TAN ,  Luis Ariel MALAVE-PEREZ ,  Mikko Topi LOIKKANEN ,  Mitsuyori SAITO ,  Angelo William PEREIRA

IPC: H02H9/04 ,  H02H1/00

Abstract: A system includes a power supply source and a power control circuit coupled to the power supply source, in which the power control circuit includes a pass field-effect transistor (FET). The system also includes a short-to-ground protection circuit coupled to an output of the pass FET. The short-to-ground protection circuit includes a sense circuit configured to detect when a magnitude and a change rate of a voltage drop at the output of the pass FET is greater than respective thresholds. The short-to-ground protection circuit also includes a control node at the output of the sense circuit. The sense circuit is configured to induce a control current at the control node in response to the magnitude and the change rate of a voltage drop at the output of the pass FET being greater than respective thresholds. The control current is used to turn off the pass FET.

公开(公告)号：US20230275545A1

公开(公告)日：2023-08-31

申请号：US17681945

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Muawiya Ali AL-KHALIDI ,  Angelo William PEREIRA ,  Pinar KORKMAZ ,  Paul David CURTIS

IPC: H03B5/04 ,  H03K5/24 ,  H03K3/03

CPC classification number: H03B5/04 ,  H03K5/24 ,  H03K3/0315

Abstract: An oscillator circuit includes a comparator having first and second inputs, the first input configured to be coupled to a reference voltage. The oscillator circuit also includes a capacitor and a first current source. The capacitor is coupled between the second input and ground. The first current source is coupled between a supply voltage terminal and the capacitor. The first current source is configured to generate a current to the capacitor that is proportional to absolute temperature.

公开(公告)号：US20220302840A1

公开(公告)日：2022-09-22

申请号：US17697008

申请日：2022-03-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky ASSAAD ,  Angelo William PEREIRA ,  Gangqiang ZHANG ,  Kae Ann WONG

IPC: H02M3/158 ,  H02M1/08

Abstract: In a switching regulator driver, a sense circuit has a transistor current input and a sense circuit output. A logic circuit has a logic circuit input and first and second outputs. The logic circuit input is coupled to the sense circuit output. A counter has a counter clock input, a counter control input and a counter output. The counter clock input is coupled to the first output. The counter control input is coupled to the second output. The counter is configured to provide a count value at the counter output. A programmable drive strength circuit has a drive strength circuit input and a transistor control output. The drive strength circuit input is coupled to the counter output. The programmable drive strength circuit is configured to adjust a drive current at the transistor control output based on the count value.

公开(公告)号：US20220137659A1

公开(公告)日：2022-05-05

申请号：US17087003

申请日：2020-11-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Luis Ariel MALAVE-PEREZ ,  Angelo William PEREIRA

IPC: G05F3/26

Abstract: A current mirror circuit includes a first current mirror transistor, a second current mirror transistor, and a bias circuit. The first current mirror transistor includes a gate and a drain. The second current mirror transistor includes a gate coupled to the gate of the first current mirror transistor. The first current mirror transistor and the second current mirror transistor are low threshold voltage transistors. The bias circuit is coupled to the gate and the drain of the first current mirror transistor. The bias circuit is configured to bias the first current mirror transistor to operate in a saturation mode when a threshold voltage of the first current mirror transistor is a negative voltage.