公开(公告)号：US06653165B2

公开(公告)日：2003-11-25

申请号：US10058322

申请日：2002-01-30

申请人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Koichi Matsuda ,  Yuzo Koda ,  Tadashi Hori

发明人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Koichi Matsuda ,  Yuzo Koda ,  Tadashi Hori

IPC分类号： H01L2100

CPC分类号： H01L31/202 ,  H01L31/056 ,  H01L31/076 ,  H01L31/1884 ,  H01L31/206 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521

摘要： For efficiently forming a semiconductor element with excellent adhesion and environment resistance, a semiconductor element forming method is configured to have a step of forming a plurality of pin junctions of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, and the method further has a step of forming a p-layer, an i-layer, and a portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.

公开(公告)号：US06794275B2

公开(公告)日：2004-09-21

申请号：US10113675

申请日：2002-04-02

申请人： Takaharu Kondo ,  Shotaro Okabe ,  Masafumi Sano ,  Akira Sakai ,  Yuzo Koda ,  Ryo Hayashi ,  Shuichiro Sugiyama ,  Koichiro Moriyama

发明人： Takaharu Kondo ,  Shotaro Okabe ,  Masafumi Sano ,  Akira Sakai ,  Yuzo Koda ,  Ryo Hayashi ,  Shuichiro Sugiyama ,  Koichiro Moriyama

IPC分类号： H01L21365

CPC分类号： H01L31/1804 ,  C23C16/46 ,  C23C16/463 ,  C23C16/505 ,  C23C16/52 ,  C23C16/545 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02491 ,  H01L21/02505 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66765 ,  H01L31/075 ,  H01L31/076 ,  H01L31/1824 ,  H01L31/1884 ,  H01L31/202 ,  Y02E10/545 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： In a process for forming a silicon-based film on a substrate according to the present invention, the substrate has a temperature gradient in the thickness direction thereof in the formation of the silicon-based film and the temperature gradient is made such that a deposition surface of the substrate has a higher temperature than a backside or the direction of the temperature gradient is reversed. With this configuration, the present invention provides a silicon-based thin film having good properties at a high deposition rate and provides a semiconductor device including it. The present invention also provides a semiconductor device including the silicon-based thin films that has good adhesion and weather-resisting properties and that can be manufactured in a short tact time.

摘要翻译： 在根据本发明的基板上形成硅基膜的方法中，在形成硅基膜时，基板在其厚度方向上具有温度梯度，并使温度梯度使得沉积表面 的衬底具有比背面更高的温度或温度梯度的方向反转。 利用这种结构，本发明提供一种在高沉积速率下具有良好性能的硅基薄膜，并提供包括它的半导体器件。 本发明还提供一种半导体器件，其包括硅基薄膜，其具有良好的粘合性和耐候性，并且可以在短的时间内制造。

公开(公告)号：US5769963A

公开(公告)日：1998-06-23

申请号：US697783

申请日：1996-08-30

申请人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Tomonori Nishimoto ,  Takahiro Yajima

发明人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Tomonori Nishimoto ,  Takahiro Yajima

IPC分类号： H01L31/0368 ,  H01L31/075 ,  H01L31/20 ,  H01L31/0352

CPC分类号： H01L31/076 ,  H01L31/03682 ,  H01L31/075 ,  H01L31/206 ,  Y02E10/546 ,  Y02E10/548 ,  Y02P70/521

摘要： A photovoltaic device comprises a semiconductor region having at least one set of semiconductor layers comprised of a first semiconductor layer having a first conductivity type, an intrinsic or substantially intrinsic second semiconductor layer, and a third semiconductor layer having a conductivity type opposite to that of the first conductivity type, the layers being formed in this order, and first and second electrodes provided such that the electrodes interpose the semiconductor region; wherein the density of a dopant impurity determining the conductivity type of the first semiconductor layer in a set of semiconductor layers which is in contact with the first electrode is varied so as to be lower on the side of the first electrode, or the grain size of crystals in the first semiconductor layer is varied so as to be smaller on the side of the first electrode. This provides a photovoltaic device that does not exhibit great lowering of characteristics even when short circuits locally occur in the semiconductor layers during long-term service.

摘要翻译： 一种光电器件包括具有至少一组半导体层的半导体区域，该组半导体层由具有第一导电类型的第一半导体层，本征的或基本上本征的第二半导体层组成，以及具有与第 第一导电类型，这些层依次形成，第一和第二电极设置成使得电极插入半导体区域; 其中确定与第一电极接触的一组半导体层中的第一半导体层的导电类型的掺杂剂杂质的密度在第一电极的侧面变化，或者在第一电极的一侧的晶粒尺寸 第一半导体层中的晶体在第一电极侧变化较小。 这提供了即使在长期服务期间在半导体层中局部出现短路的情况下也不会出现特性的降低的光电器件。

公开(公告)号：US5720826A

公开(公告)日：1998-02-24

申请号：US657066

申请日：1996-05-29

申请人： Ryo Hayashi ,  Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Jinsho Matsuyama ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Takahiro Yajima

发明人： Ryo Hayashi ,  Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Jinsho Matsuyama ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Takahiro Yajima

IPC分类号： H01L31/04 ,  H01L31/0392 ,  H01L31/075 ,  H01L31/20

CPC分类号： H01L31/076 ,  H01L31/03921 ,  H01L31/202 ,  H01L31/204 ,  H01L31/206 ,  Y02E10/548 ,  Y02P70/521

摘要： Provided are a photovoltaic element suitable for practical use, low in cost, high in reliability, and high in photoelectric conversion efficiency, and a fabrication process thereof. In the photovoltaic element having stacked layers of non-single-crystal semiconductors, at least an i-type semiconductor layer and a second conductivity type semiconductor layer are stacked on a first conductivity type semiconductor layer, and the second conduction type semiconductor layer has a layer A formed by exposing the surface of the i-type semiconductor layer to a plasma containing a valence electron controlling agent and a layer B deposited on the layer A by a CVD process using at least the valence electron controlling agent and the main constituent elements of the i-type semiconductor layer.

摘要翻译： 提供适用于实际使用，成本低，可靠性高，光电转换效率高的光电元件及其制造方法。 在具有非单晶半导体层叠的光电元件中，在第一导电型半导体层上层叠至少i型半导体层和第二导电型半导体层，第二导电型半导体层具有层 A通过使用至少化合价电子控制剂和主要构成元素的CVD工艺将i型半导体层的表面暴露于含有价电子控制剂和沉积在层A上的层B的等离子体 i型半导体层。

公开(公告)号：US07211708B2

公开(公告)日：2007-05-01

申请号：US09822191

申请日：2001-04-02

申请人： Takeshi Shishido ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

发明人： Takeshi Shishido ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

IPC分类号： A62D3/00 ,  B08B15/00 ,  B08B5/00 ,  H05H1/03 ,  H05H1/16 ,  H05H1/48

CPC分类号： H01J37/32844 ,  C23C14/564 ,  C23C16/4412 ,  Y02C20/30 ,  Y02P70/605

摘要： A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.

摘要翻译： 化学反应诱发装置设置在连接用于对衬底或膜进行等离子体处理的处理空间到排气装置的排气管线中，并且至少从处理空间排出的未反应气体或副产物发生化学反应 不允许处理空间中的等离子体到达化学反应诱导装置，从而提高化学反应诱导装置处理未反应气体或副产物的处理能力。

公开(公告)号：US20070169890A1

公开(公告)日：2007-07-26

申请号：US11694889

申请日：2007-03-30

申请人： TAKESHI SHISHIDO ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

发明人： TAKESHI SHISHIDO ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

IPC分类号： H01L21/306 ,  C23C16/00

CPC分类号： H01J37/32844 ,  C23C14/564 ,  C23C16/4412 ,  Y02C20/30 ,  Y02P70/605

摘要： A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.

摘要翻译： 化学反应诱发装置设置在连接用于对衬底或膜进行等离子体处理的处理空间到排气装置的排气管线中，并且至少从处理空间排出的未反应气体或副产物发生化学反应 不允许处理空间中的等离子体到达化学反应诱导装置，从而提高化学反应诱导装置处理未反应气体或副产物的处理能力。

公开(公告)号：US06877458B2

公开(公告)日：2005-04-12

申请号：US09797566

申请日：2001-03-05

申请人： Hiroyuki Ozaki ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Tadashi Hori

发明人： Hiroyuki Ozaki ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Tadashi Hori

IPC分类号： C23C16/455 ,  C23C16/44 ,  C23C16/509 ,  C23C16/54 ,  H01L21/205 ,  H01L31/04 ,  C23C16/00

CPC分类号： H01J37/32834 ,  C23C16/4412 ,  C23C16/5096 ,  C23C16/545

摘要： To provide an apparatus for forming a deposited film, which is a parallel plate electrode type CVD apparatus, with a discharge vessel receiving a material gas flowing therein and discharging air therefrom, decomposing the material gas by the aid of a plasma generated therein, and depositing the film on the substrate, in which the exhaust port of the material gas exhaust means has an opening wider in the lateral direction than the parallel plate electrode. This structure diminishes the stagnant region of the material gas during the deposited film forming process and controls formation of by-products, to deposit the film uniform in quality and thickness.

摘要翻译： 为了提供一种用于形成沉积膜的装置，其是平行板电极型CVD装置，放电容器容纳在其中流动的材料气体并从其中排出空气，借助于其中产生的等离子体分解原料气体，并沉积 基板上的材料气体排出装置的排气口的横向方向上的开口比平行板电极宽。 这种结构减少了沉积膜形成过程期间材料气体的停滞区域，并且控制副产物的形成，以使膜在质量和厚度上均匀。

公开(公告)号：US06447612B1

公开(公告)日：2002-09-10

申请号：US09625840

申请日：2000-07-26

申请人： Koichiro Moriyama ,  Masahiro Kanai ,  Yuzo Koda ,  Tadashi Hori

发明人： Koichiro Moriyama ,  Masahiro Kanai ,  Yuzo Koda ,  Tadashi Hori

IPC分类号： C23C1600

CPC分类号： C23C16/4409 ,  C23C16/545

摘要： A film-forming apparatus which has at least a vacuum vessel whose inside is capable of being vacuumed and a film-forming chamber having a discharge region provided in said vacuum vessel and in which a substrate web having a desired width and a desired length is arranged so as to constitute a part of said film-forming chamber, wherein said substrate web is continuously moved to pass through said discharge region of said film-forming chamber to continuously form a deposited film on said substrate web, characterized in that said film-forming chamber is provided with an opening-adjusting member such that said opening-adjusting member constitutes an entrance or/and an exit of said film-forming chamber, and a face of said opening-adjusting member which is opposed to said substrate web has one or more grooves formed substantially in parallel to a direction for said substrate web to be transported.

摘要翻译： 一种成膜装置，其至少具有能够被真空的内部的真空容器和具有设置在所述真空容器中的放电区域的成膜室，其中布置具有期望宽度和期望长度的基材网 以构成所述成膜室的一部分，其中所述基片网连续移动以通过所述成膜室的所述放电区域，以在所述基片网上连续形成沉积膜，其特征在于，所述成膜 腔室设置有开口调节构件，使得所述开口调节构件构成所述成膜室的入口或/和出口，并且与所述基材腹板相对的所述开口调节构件的表面具有一个或多个 更多的凹槽基本上平行于要输送的衬底腹板的方向形成。

公开(公告)号：US5439533A

公开(公告)日：1995-08-08

申请号：US337195

申请日：1994-11-07

申请人： Keishi Saito ,  Jinsho Matsuyama ,  Toshimitsu Kariya ,  Koichi Matsuda ,  Yuzo Koda ,  Naoto Okada

发明人： Keishi Saito ,  Jinsho Matsuyama ,  Toshimitsu Kariya ,  Koichi Matsuda ,  Yuzo Koda ,  Naoto Okada

IPC分类号： H01L31/04 ,  H01L31/0392 ,  H01L31/075 ,  H01L31/076 ,  H01L31/20 ,  H01L31/18

CPC分类号： H01L31/03921 ,  H01L31/075 ,  H01L31/076 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/548 ,  Y02P70/521 ,  Y10S136/293

摘要： An object of the present invention is to provide a photovoltaic device and a method of producing the photovoltaic device which can prevent recombination of photo-excited carriers and which permits increases in the open circuit voltage and the carrier range. The photovoltaic device of the present invention has a laminate structure composed of at least a p-type layer of a silicon non-single crystal semiconductor, a photoactive layer having a plurality of i-type layers, and an n-type layer. The photoactive layer has a laminate structure composed of a first i-type layer deposited on the side of the n-type layer by a microwave plasma CVD process, and a second i-type layer deposited on the side of said the p-type layer by an RF plasma CVD process. The first i-type layer deposited by the microwave plasma CVD process contains at least silicon and carbon atoms, and has a minimum band gap between the center thereof and the p-type layer, and the second i-type layer deposited by the RF plasma CVD process contains at least silicon atoms and has a thickness of 30 nm or less.

摘要翻译： 本发明的目的是提供一种能够防止光激发载流子复合并且允许开路电压和载流子范围增加的光电器件及其制造方法。 本发明的光电器件具有至少由非硅单晶半导体的p型层，具有多个i型层的光活性层和n型层构成的层叠结构。 光敏层具有由微波等离子体CVD工艺在n型层侧沉积的第一i型层和沉积在所述p型层侧的第二i型层构成的层叠结构 通过RF等离子体CVD工艺。 通过微波等离子体CVD法沉积的第一i型层至少包含硅和碳原子，并且在其中心和p型层之间具有最小的带隙，并且由RF等离子体沉积的第二i型层 CVD工艺至少含有硅原子，其厚度为30nm以下。

公开(公告)号：US06472296B2

公开(公告)日：2002-10-29

申请号：US09912343

申请日：2001-07-26

申请人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Tadashi Sawayama ,  Yuzo Koda ,  Takahiro Yajima

发明人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Tadashi Sawayama ,  Yuzo Koda ,  Takahiro Yajima

IPC分类号： H01L2120

CPC分类号： C23C16/509 ,  H01J37/32082 ,  H01J37/32706 ,  H01L21/02425 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L31/1824 ,  H01L31/202 ,  H01L31/204 ,  H01L31/206 ,  Y02E10/545 ,  Y02P70/521

摘要： A process for producing a semiconductor layer by introducing a raw gas into a discharge chamber and supplying high-frequency power to the chamber to decompose the raw gas by discharge, thereby forming a semiconductor layer on a substrate within the discharge chamber, the process comprising the steps of supplying high-frequency power of at least very high frequency (VHF) as the high-frequency power; supplying bias power of direct current power and/or high-frequency power of radio-frequency (RF) together with the high-frequency power of VHF to the discharge chamber; and controlling a direct current component of an electric current flowing into an electrode, to which the bias power is supplied, so as to fall within a range of from 0.1 A/m2 to 10 A/m2 in terms of a current density based on the area of an inner wall of the discharge chamber. A good-quality semiconductor layer can be deposited over a large area at a high speed.

摘要翻译： 一种制造半导体层的方法，该方法是通过将原料气体引入放电室并向室内供给高频电力，以通过放电来分解原料气体，由此在放电室内的基板上形成半导体层，该方法包括 提供至少非常高频（VHF）的高频功率作为高频功率的步骤; 将直流电力和/或射频（RF）的高频功率与VHF的高频功率一起提供给放电室; 并且以电流密度为基础控制流入施加偏压功率的电极的电流的直流分量，以0.1A / m 2至10A / m 2的范围内 放电室内壁面积。 高质量的半导体层可以在大面积上高速沉积。